On Tue, 2 Oct 2012 17:43:37 -0500 Jesse Barnes <jbarnes at virtuousgeek.org> wrote: > v2: use correct register > > References: https://bugs.freedesktop.org/show_bug.cgi?id=50233 > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org> > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 8 +++++++- > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 58935a3..3b75052 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -3446,6 +3446,7 @@ > > #define GEN7_L3_CHICKEN_MODE_REGISTER 0xB030 > #define GEN7_WA_L3_CHICKEN_MODE 0x20000000 > +#define GEN7_WA_DOP_CLOCK_GATING_DISABLE 0x08000000 Looks like this doesn't belong in this patch. > > /* WaCatErrorRejectionIssue */ > #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030 > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index f7344c9..6be5910 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3545,7 +3545,9 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) > I915_WRITE(GEN7_L3CNTLREG1, > GEN7_WA_FOR_GEN7_L3_CONTROL); > I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, > - GEN7_WA_L3_CHICKEN_MODE); > + GEN7_WA_L3_CHICKEN_MODE); > + I915_WRITE(GEN7_ROW_CHICKEN2, > + _MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE)); > > /* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock > * gating disable must be set. Failure to set it results in > @@ -3617,6 +3619,10 @@ static void valleyview_init_clock_gating(struct drm_device *dev) > I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS); > I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE); > > + /* WaDisableDopClockGating */ > + I915_WRITE(GEN7_ROW_CHICKEN2, > + _MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE)); > + > /* This is required by WaCatErrorRejectionIssue */ > I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG, > I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) | I think you're missing the GT2 disable. -- Ben Widawsky, Intel Open Source Technology Center
