Hi
2012/11/26 Daniel Vetter <daniel.vetter at ffwll.ch>:
> ... with is_dual_link_lvds introduced in
>
> commit b03543857fd75876b96e10d4320b775e95041bb7
> Author: Takashi Iwai <tiwai at suse.de>
> Date: Tue Mar 20 13:07:05 2012 +0100
>
> drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
>
> All these checks predate this commit and have simply been overlooked.
> Since we don't support switching between single-link and dual-link
> modes anyway, this different checks could at best only get in the way
> of refactorings, and in the worst case cause inconsistencies.
>
> v2: Update the comment, we now have a solid way to figure out whether
> we need dual-link lvds or not (falling back to vbt values as a last
> resort). We still don't know how to switch between dual-link and
> single link so leave that part intact. I'm not sure though whether
> switching between these two modes makes any sense - we always drive
> the panel at its fixed mode (with a fixed bpc) anyway ...
>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 15 ++++++---------
> 1 file changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 647f16e..dd4cb43 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -690,13 +690,11 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
> intel_clock_t clock;
> int err = target;
>
> - if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
> - (I915_READ(LVDS)) != 0) {
> + if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
> /*
> - * For LVDS, if the panel is on, just rely on its current
> - * settings for dual-channel. We haven't figured out how to
> - * reliably set up different single/dual channel state, if we
> - * even can.
> + * For LVDS just rely on its current settings for dual-channel.
> + * We haven't figured out how to reliably set up different
> + * single/dual channel state, if we even can.
> */
> if (is_dual_link_lvds(dev_priv, LVDS))
> clock.p2 = limit->p2.p2_fast;
> @@ -766,8 +764,7 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
> lvds_reg = PCH_LVDS;
> else
> lvds_reg = LVDS;
> - if ((I915_READ(lvds_reg) & LVDS_CLKB_POWER_MASK) ==
> - LVDS_CLKB_POWER_UP)
> + if (is_dual_link_lvds(dev_priv, lvds_reg))
> clock.p2 = limit->p2.p2_fast;
> else
> clock.p2 = limit->p2.p2_slow;
> @@ -5357,7 +5354,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
> if (is_lvds) {
> if ((intel_panel_use_ssc(dev_priv) &&
> dev_priv->lvds_ssc_freq == 100) ||
> - (I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
> + is_dual_link_lvds(dev_priv, PCH_LVDS))
> factor = 25;
> } else if (is_sdvo && is_tv)
> factor = 20;
> --
> 1.7.11.7
>
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--
Paulo Zanoni
