Here's my second attempt at making atomic page flips synchronize with the GPU in a non-blocking manner. What the code does by default is grap the last_write_seqno from the object, call intel_gem_check_olr() on it, perform the lazy coherency check, and if the seqno still hasn't passed it'll enable the irq and let that sort things out. Now, I'm not sure if the call to intel_gem_check_olr() is even necessary in practice, or can I just go on to checking the seqno directly. With some earlier patches I was seeing an occasional glitch on my screen, and so I tried out a few different variations (always adding a new request to the ring and forcing a GPU cache flush), and for now I left that code in there under a bunch of ifdefs. The glitch was probably caused by committing the wrong register values to the hardware, and patch 05/13 should fix that. I haven't seen any issues for a while now. The real meat is at the beginning of the patch set, and the second half contains just debugging aids. Oh, and I rebased the whole thing on top of drm-intel-nightly yesterday. The haswell changes gave me a bit of grief, but I think I managed to preserve all of them, and still make the atomic stuff work. But I haven't actually tried running it on hsw hardware. Besides my own tests, I also gave Ander's nuclear-pageflip branch of weston [1] a go on top of this stuff. Seems to be working quite nicely so far. Now I just need a working browser and sloppy focus, and I can ditch X ;) As usual my git tree [2] has the whole set for easier consumption. [1] https://github.com/anderco/weston/tree/nuclear-pageflip [2] https://gitorious.org/vsyrjala/linux/commits/drm_atomic_21
