On Thu, Nov 15, 2012 at 10:42:02AM +0000, Chris Wilson wrote: > On Wed, 14 Nov 2012 17:47:39 +0100, Daniel Vetter <daniel.vetter at ffwll.ch> wrote: > > Jani Nikula noticed that the parentheses are wrong and we & the bit > > with the register address instead of the read-back value. He sent a > > patch to correct that. > > > > On second look, we write the same register in the previous line, and > > the w/a seems to be to set FDI_RX_PHASE_SYNC_POINTER_OVR to enable the > > logic, then keep always set FDI_RX_PHASE_SYNC_POINTER_OVR and toggle > > ~FDI_RX_PHASE_SYNC_POINTER_EN before/after enabling the pc transcoder. > > > > So the right things seems to be to simply kill the 2nd write. > > > > Cc: Jani Nikula <jani.nikula at intel.com> > > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch> > > Looks sane(r). > Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> Queued for -next, thanks for the review. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
