[PATCH 2/2] Update gem_ring_sync_loop to support VEBOX ring (the 4th ring) on Haswell

[haihao.xiang at intel.com (Xiang, Haihao)]

From: "Xiang, Haihao" <haihao.xiang at intel.com>

Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>
---
 tests/gem_ring_sync_loop.c |   18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/tests/gem_ring_sync_loop.c b/tests/gem_ring_sync_loop.c
index b689bcd..199dcfd 100644
--- a/tests/gem_ring_sync_loop.c
+++ b/tests/gem_ring_sync_loop.c
@@ -56,14 +56,26 @@ static drm_intel_bo *target_buffer;
 #define MI_DO_COMPARE			(1<<21)
 
 static void
-store_dword_loop(void)
+store_dword_loop(int devid)
 {
 	int i;
+	int num_rings = 3;
 
 	srandom(0xdeadbeef);
 
+	if (IS_HASWELL(devid))
+		num_rings = 4;
+	else if (IS_IVYBRIDGE(devid) || IS_GEN6(devid))
+		num_rings = 3;
+	else if (IS_GEN5(devid) || IS_G4X(devid))
+		num_rings = 2;
+	else
+		num_rings = 1;
+
+        fprintf(stderr, "The number of rings: %d\n", num_rings);
+
 	for (i = 0; i < 0x100000; i++) {
-		int ring = random() % 3 + 1;
+		int ring = random() % num_rings + 1;
 
 		if (ring == I915_EXEC_RENDER) {
 			BEGIN_BATCH(4);
@@ -127,7 +139,7 @@ int main(int argc, char **argv)
 		exit(-1);
 	}
 
-	store_dword_loop();
+	store_dword_loop(devid);
 
 	drm_intel_bo_unreference(target_buffer);
 	intel_batchbuffer_free(batch);
-- 
1.7.9.5