From: Paulo Zanoni <paulo.r.zanoni at intel.com>
Some HDMI registers can be used for SDVO, so saying "HDMIB" should be
the same as saying "SDVOB" for a given HW generation. This was not
true and led to confusions and even a regression.
Previously we had:
- SDVO{B,C} defined as the Gen3+ resgisters
- HDMI{B,C,D} and PCH_SDVOB defined as the PCH registers
Now we have:
- GEN3_SDVO{B,C} defined as the Gen3+ registers
- GEN4_HDMI{B,C} defined as the Gen4+ registers
- PCH_SDVOB defined as the PCH register
- PCH_HDMI{B,C,D} defined as the PCH registers
So now PCH_SDVOB is the same as PCH_HDMIB and GEN3_SDVOB is the same
as GEN4_HDMIB.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 20 +++++++++---------
drivers/gpu/drm/i915/intel_display.c | 38 +++++++++++++++++-----------------
drivers/gpu/drm/i915/intel_hdmi.c | 24 ++++++++++-----------
drivers/gpu/drm/i915/intel_sdvo.c | 18 ++++++++--------
4 files changed, 50 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1855ac7..e1f44059 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1588,8 +1588,9 @@
#define SDVOB_HOTPLUG_INT_STATUS_I915 (1 << 6)
/* SDVO port control */
-#define SDVOB 0x61140
-#define SDVOC 0x61160
+#define GEN3_SDVOB 0x61140
+#define GEN3_SDVOC 0x61160
+#define PCH_SDVOB 0xe1140
#define SDVO_ENABLE (1 << 31)
#define SDVO_PIPE_B_SELECT (1 << 30)
#define SDVO_STALL_SELECT (1 << 29)
@@ -3806,9 +3807,14 @@
#define ADPA_CRT_HOTPLUG_VOLREF_475MV (1<<17)
#define ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1<<16)
-/* or SDVOB */
+/* The same register may be used for SDVO or HDMI */
+#define GEN4_HDMIB GEN3_SDVOB
+#define GEN4_HDMIC GEN3_SDVOC
#define VLV_HDMIB 0x61140
-#define HDMIB 0xe1140
+#define PCH_HDMIB PCH_SDVOB
+#define PCH_HDMIC 0xe1150
+#define PCH_HDMID 0xe1160
+
#define PORT_ENABLE (1 << 31)
#define TRANSCODER(pipe) ((pipe) << 30)
#define TRANSCODER_CPT(pipe) ((pipe) << 29)
@@ -3829,12 +3835,6 @@
#define HSYNC_ACTIVE_HIGH (1 << 3)
#define PORT_DETECTED (1 << 2)
-/* PCH SDVOB multiplex with HDMIB */
-#define PCH_SDVOB HDMIB
-
-#define HDMIC 0xe1150
-#define HDMID 0xe1160
-
#define PCH_LVDS 0xe1180
#define LVDS_DETECTED (1 << 1)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3c71850..d1013b7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1257,9 +1257,9 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
"PCH LVDS enabled on transcoder %c, should be disabled\n",
pipe_name(pipe));
- assert_pch_hdmi_disabled(dev_priv, pipe, HDMIB);
- assert_pch_hdmi_disabled(dev_priv, pipe, HDMIC);
- assert_pch_hdmi_disabled(dev_priv, pipe, HDMID);
+ assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMIB);
+ assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMIC);
+ assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID);
}
/**
@@ -1747,9 +1747,9 @@ static void intel_disable_pch_ports(struct drm_i915_private *dev_priv,
udelay(100);
}
- disable_pch_hdmi(dev_priv, pipe, HDMIB);
- disable_pch_hdmi(dev_priv, pipe, HDMIC);
- disable_pch_hdmi(dev_priv, pipe, HDMID);
+ disable_pch_hdmi(dev_priv, pipe, PCH_HDMIB);
+ disable_pch_hdmi(dev_priv, pipe, PCH_HDMIC);
+ disable_pch_hdmi(dev_priv, pipe, PCH_HDMID);
}
int
@@ -6519,20 +6519,20 @@ static void intel_setup_outputs(struct drm_device *dev)
} else if (HAS_PCH_SPLIT(dev)) {
int found;
- if (I915_READ(HDMIB) & PORT_DETECTED) {
+ if (I915_READ(PCH_HDMIB) & PORT_DETECTED) {
/* PCH SDVOB multiplex with HDMIB */
found = intel_sdvo_init(dev, PCH_SDVOB, true);
if (!found)
- intel_hdmi_init(dev, HDMIB);
+ intel_hdmi_init(dev, PCH_HDMIB);
if (!found && (I915_READ(PCH_DP_B) & DP_DETECTED))
intel_dp_init(dev, PCH_DP_B);
}
- if (I915_READ(HDMIC) & PORT_DETECTED)
- intel_hdmi_init(dev, HDMIC);
+ if (I915_READ(PCH_HDMIC) & PORT_DETECTED)
+ intel_hdmi_init(dev, PCH_HDMIC);
- if (I915_READ(HDMID) & PORT_DETECTED)
- intel_hdmi_init(dev, HDMID);
+ if (I915_READ(PCH_HDMID) & PORT_DETECTED)
+ intel_hdmi_init(dev, PCH_HDMID);
if (I915_READ(PCH_DP_C) & DP_DETECTED)
intel_dp_init(dev, PCH_DP_C);
@@ -6543,12 +6543,12 @@ static void intel_setup_outputs(struct drm_device *dev)
} else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) {
bool found = false;
- if (I915_READ(SDVOB) & SDVO_DETECTED) {
+ if (I915_READ(GEN3_SDVOB) & SDVO_DETECTED) {
DRM_DEBUG_KMS("probing SDVOB\n");
- found = intel_sdvo_init(dev, SDVOB, true);
+ found = intel_sdvo_init(dev, GEN3_SDVOB, true);
if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) {
DRM_DEBUG_KMS("probing HDMI on SDVOB\n");
- intel_hdmi_init(dev, SDVOB);
+ intel_hdmi_init(dev, GEN4_HDMIB);
}
if (!found && SUPPORTS_INTEGRATED_DP(dev)) {
@@ -6559,16 +6559,16 @@ static void intel_setup_outputs(struct drm_device *dev)
/* Before G4X SDVOC doesn't have its own detect register */
- if (I915_READ(SDVOB) & SDVO_DETECTED) {
+ if (I915_READ(GEN3_SDVOB) & SDVO_DETECTED) {
DRM_DEBUG_KMS("probing SDVOC\n");
- found = intel_sdvo_init(dev, SDVOC, false);
+ found = intel_sdvo_init(dev, GEN3_SDVOC, false);
}
- if (!found && (I915_READ(SDVOC) & SDVO_DETECTED)) {
+ if (!found && (I915_READ(GEN3_SDVOC) & SDVO_DETECTED)) {
if (SUPPORTS_INTEGRATED_HDMI(dev)) {
DRM_DEBUG_KMS("probing HDMI on SDVOC\n");
- intel_hdmi_init(dev, SDVOC);
+ intel_hdmi_init(dev, GEN3_SDVOC);
}
if (SUPPORTS_INTEGRATED_DP(dev)) {
DRM_DEBUG_KMS("probing DP_C\n");
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index fc09d04..d0a466a 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -339,10 +339,10 @@ static void g4x_set_infoframes(struct drm_encoder *encoder,
}
switch (intel_hdmi->hdmi_reg) {
- case SDVOB:
+ case GEN4_HDMIB:
port = VIDEO_DIP_PORT_B;
break;
- case SDVOC:
+ case GEN4_HDMIC:
port = VIDEO_DIP_PORT_C;
break;
default:
@@ -389,13 +389,13 @@ static void ibx_set_infoframes(struct drm_encoder *encoder,
}
switch (intel_hdmi->hdmi_reg) {
- case HDMIB:
+ case PCH_HDMIB:
port = VIDEO_DIP_PORT_B;
break;
- case HDMIC:
+ case PCH_HDMIC:
port = VIDEO_DIP_PORT_C;
break;
- case HDMID:
+ case PCH_HDMID:
port = VIDEO_DIP_PORT_D;
break;
default:
@@ -618,10 +618,10 @@ static bool g4x_hdmi_connected(struct intel_hdmi *intel_hdmi)
uint32_t bit;
switch (intel_hdmi->hdmi_reg) {
- case SDVOB:
+ case GEN4_HDMIB:
bit = HDMIB_HOTPLUG_LIVE_STATUS;
break;
- case SDVOC:
+ case GEN4_HDMIC:
bit = HDMIC_HOTPLUG_LIVE_STATUS;
break;
default:
@@ -844,23 +844,23 @@ void intel_hdmi_init(struct drm_device *dev, int hdmi_reg)
intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
/* Set up the DDC bus. */
- if (hdmi_reg == SDVOB) {
+ if (hdmi_reg == GEN4_HDMIB) {
intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
- } else if (hdmi_reg == SDVOC) {
+ } else if (hdmi_reg == GEN4_HDMIC) {
intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
- } else if (hdmi_reg == HDMIB) {
+ } else if (hdmi_reg == PCH_HDMIB) {
intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
- } else if (hdmi_reg == HDMIC) {
+ } else if (hdmi_reg == PCH_HDMIC) {
intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
- } else if (hdmi_reg == HDMID) {
+ } else if (hdmi_reg == PCH_HDMID) {
intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index a1840f4..2b2919c 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -240,10 +240,10 @@ static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
return;
}
- if (intel_sdvo->sdvo_reg == SDVOB) {
- cval = I915_READ(SDVOC);
+ if (intel_sdvo->sdvo_reg == GEN3_SDVOB) {
+ cval = I915_READ(GEN3_SDVOC);
} else {
- bval = I915_READ(SDVOB);
+ bval = I915_READ(GEN3_SDVOB);
}
/*
* Write the registers twice for luck. Sometimes,
@@ -252,10 +252,10 @@ static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
*/
for (i = 0; i < 2; i++)
{
- I915_WRITE(SDVOB, bval);
- I915_READ(SDVOB);
- I915_WRITE(SDVOC, cval);
- I915_READ(SDVOC);
+ I915_WRITE(GEN3_SDVOB, bval);
+ I915_READ(GEN3_SDVOB);
+ I915_WRITE(GEN3_SDVOC, cval);
+ I915_READ(GEN3_SDVOC);
}
}
@@ -1103,10 +1103,10 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
} else {
sdvox = I915_READ(intel_sdvo->sdvo_reg);
switch (intel_sdvo->sdvo_reg) {
- case SDVOB:
+ case GEN3_SDVOB:
sdvox &= SDVOB_PRESERVE_MASK;
break;
- case SDVOC:
+ case GEN3_SDVOC:
sdvox &= SDVOC_PRESERVE_MASK;
break;
}
--
1.7.10
