Intended for upstream testing so that we can still exercise the LMEM plumbing and !HAS_MAPPABLE_APERTURE paths. Smoke tested on Skull Canyon device. This works by allocating an intel_memory_region for a reserved portion of system memory, which we treat like LMEM. For the LMEMBAR we steal the aperture and 1:1 it map to the stolen region. To enable simply set i915_fake_lmem_start= on the kernel cmdline with the start of reserved region(see memmap=). The size of the region we can use is determined by the size of the mappable aperture, so the size of reserved region should be >= mappable_end. eg. memmap=2G$16G i915.fake_lmem_start=0x400000000 Signed-off-by: Matthew Auld <matthew.auld@xxxxxxxxx> Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Cc: Abdiel Janulgue <abdiel.janulgue@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.c | 15 +++++ drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/i915_gem_gtt.c | 3 + drivers/gpu/drm/i915/i915_params.c | 3 + drivers/gpu/drm/i915/i915_params.h | 3 +- drivers/gpu/drm/i915/intel_memory_region.h | 4 ++ drivers/gpu/drm/i915/intel_region_lmem.c | 76 ++++++++++++++++++++++ drivers/gpu/drm/i915/intel_region_lmem.h | 3 + 8 files changed, 108 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 3d6fe993f26e..891937de6a2b 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1869,6 +1869,9 @@ static void i915_driver_destroy(struct drm_i915_private *i915) pci_set_drvdata(pdev, NULL); } +struct resource intel_graphics_fake_lmem_res __ro_after_init = DEFINE_RES_MEM(0, 0); +EXPORT_SYMBOL(intel_graphics_fake_lmem_res); + /** * i915_driver_load - setup chip and create an initial config * @pdev: PCI device @@ -1895,6 +1898,18 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) if (!i915_modparams.nuclear_pageflip && match_info->gen < 5) dev_priv->drm.driver_features &= ~DRIVER_ATOMIC; + /* Check if we need fake LMEM */ + if (INTEL_GEN(dev_priv) >= 9 && i915_modparams.fake_lmem_start > 0) { + intel_graphics_fake_lmem_res.start = i915_modparams.fake_lmem_start; + intel_graphics_fake_lmem_res.end = SZ_2G; /* Placeholder; depends on aperture size */ + + mkwrite_device_info(dev_priv)->memory_regions = + REGION_SMEM | REGION_LMEM; + GEM_BUG_ON(!HAS_LMEM(dev_priv)); + + pr_info("Intel graphics fake LMEM starts at %pa\n", &intel_graphics_fake_lmem_res.start); + } + ret = pci_enable_device(pdev); if (ret) goto out_fini; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 715e630a872d..9a2c79fa8088 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2815,4 +2815,6 @@ static inline void add_taint_for_CI(unsigned int taint) add_taint(taint, LOCKDEP_STILL_OK); } +extern struct resource intel_graphics_fake_lmem_res; + #endif diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 3a8965048a06..df4928c8b10a 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -2938,6 +2938,9 @@ int i915_gem_init_memory_regions(struct drm_i915_private *i915) case INTEL_STOLEN: mem = i915_gem_stolen_setup(i915); break; + case INTEL_LMEM: + mem = i915_gem_setup_fake_lmem(i915); + break; } if (IS_ERR(mem)) { diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 296452f9efe4..59a6ad6261b9 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -164,6 +164,9 @@ i915_param_named_unsafe(dmc_firmware_path, charp, 0400, i915_param_named_unsafe(enable_dp_mst, bool, 0600, "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)"); +i915_param_named_unsafe(fake_lmem_start, ulong, 0600, + "Fake LMEM start offset (default: 0)"); + #if IS_ENABLED(CONFIG_DRM_I915_DEBUG) i915_param_named_unsafe(inject_load_failure, uint, 0400, "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index d29ade3b7de6..b9698722c957 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -77,7 +77,8 @@ struct drm_printer; param(bool, verbose_state_checks, true) \ param(bool, nuclear_pageflip, false) \ param(bool, enable_dp_mst, true) \ - param(bool, enable_gvt, false) + param(bool, enable_gvt, false) \ + param(unsigned long, fake_lmem_start, 0) #define MEMBER(T, member, ...) T member; struct i915_params { diff --git a/drivers/gpu/drm/i915/intel_memory_region.h b/drivers/gpu/drm/i915/intel_memory_region.h index bee0c022d295..4960096ec30f 100644 --- a/drivers/gpu/drm/i915/intel_memory_region.h +++ b/drivers/gpu/drm/i915/intel_memory_region.h @@ -9,6 +9,7 @@ #include <linux/ioport.h> #include <linux/mutex.h> #include <linux/io-mapping.h> +#include <drm/drm_mm.h> #include "i915_buddy.h" @@ -71,6 +72,9 @@ struct intel_memory_region { struct io_mapping iomap; struct resource region; + /* For faking for lmem */ + struct drm_mm_node fake_mappable; + struct i915_buddy_mm mm; struct mutex mm_lock; diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c index 7003e7bff90c..2028261f4e80 100644 --- a/drivers/gpu/drm/i915/intel_region_lmem.c +++ b/drivers/gpu/drm/i915/intel_region_lmem.c @@ -241,9 +241,41 @@ lmem_create_object(struct intel_memory_region *mem, return obj; } +static int i915_gem_init_fake_lmem_bar(struct intel_memory_region *mem) +{ + struct drm_i915_private *i915 = mem->i915; + struct i915_ggtt *ggtt = &i915->ggtt; + unsigned long n; + int ret; + + mem->fake_mappable.start = 0; + mem->fake_mappable.size = resource_size(&mem->region); + mem->fake_mappable.color = I915_COLOR_UNEVICTABLE; + + ret = drm_mm_reserve_node(&ggtt->vm.mm, &mem->fake_mappable); + if (ret) + return ret; + + /* 1:1 map the mappable aperture to our reserved region */ + for (n = 0; n < mem->fake_mappable.size >> PAGE_SHIFT; ++n) { + ggtt->vm.insert_page(&ggtt->vm, + mem->region.start + (n << PAGE_SHIFT), + n << PAGE_SHIFT, I915_CACHE_NONE, 0); + } + + return 0; +} + +static void i915_gem_relase_fake_lmem_bar(struct intel_memory_region *mem) +{ + if (drm_mm_node_allocated(&mem->fake_mappable)) + drm_mm_remove_node(&mem->fake_mappable); +} + static void region_lmem_release(struct intel_memory_region *mem) { + i915_gem_relase_fake_lmem_bar(mem); io_mapping_fini(&mem->iomap); i915_memory_region_release_buddy(mem); } @@ -253,6 +285,14 @@ region_lmem_init(struct intel_memory_region *mem) { int ret; + if (intel_graphics_fake_lmem_res.start) { + ret = i915_gem_init_fake_lmem_bar(mem); + if (ret) { + GEM_BUG_ON(1); + return ret; + } + } + if (!io_mapping_init_wc(&mem->iomap, mem->io_start, resource_size(&mem->region))) @@ -278,6 +318,7 @@ void __iomem *i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object *obj, resource_size_t offset; offset = i915_gem_object_get_dma_address(obj, n); + offset -= intel_graphics_fake_lmem_res.start; return io_mapping_map_atomic_wc(&obj->memory_region->iomap, offset); } @@ -291,6 +332,7 @@ void __iomem *i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj, GEM_BUG_ON(!(obj->flags & I915_BO_ALLOC_CONTIGUOUS)); offset = i915_gem_object_get_dma_address(obj, n); + offset -= intel_graphics_fake_lmem_res.start; return io_mapping_map_wc(&obj->memory_region->iomap, offset, size); } @@ -307,6 +349,7 @@ resource_size_t i915_gem_object_lmem_io_offset(struct drm_i915_gem_object *obj, * here, and elsewhere like in the gtt paths. */ daddr = i915_gem_object_get_dma_address(obj, n); + daddr -= intel_graphics_fake_lmem_res.start; return mem->io_start + daddr; } @@ -326,3 +369,36 @@ i915_gem_object_create_lmem(struct drm_i915_private *i915, return i915_gem_object_create_region(i915->regions[INTEL_MEMORY_LMEM], size, flags); } + +struct intel_memory_region * +i915_gem_setup_fake_lmem(struct drm_i915_private *i915) +{ + struct pci_dev *pdev = i915->drm.pdev; + struct intel_memory_region *mem; + resource_size_t mappable_end; + resource_size_t io_start; + resource_size_t start; + + GEM_BUG_ON(HAS_MAPPABLE_APERTURE(i915)); + GEM_BUG_ON(!intel_graphics_fake_lmem_res.start); + + /* Your mappable aperture belongs to me now! */ + mappable_end = pci_resource_len(pdev, 2); + io_start = pci_resource_start(pdev, 2), + start = intel_graphics_fake_lmem_res.start; + + mem = intel_memory_region_create(i915, + start, + mappable_end, + I915_GTT_PAGE_SIZE_4K, + io_start, + ®ion_lmem_ops); + if (!IS_ERR(mem)) { + DRM_INFO("Intel graphics fake LMEM: %pR\n", &mem->region); + DRM_INFO("Intel graphics fake LMEM IO start: %llx\n", + (u64)mem->io_start); + } + + return mem; +} + diff --git a/drivers/gpu/drm/i915/intel_region_lmem.h b/drivers/gpu/drm/i915/intel_region_lmem.h index 68232615a874..41bc411068de 100644 --- a/drivers/gpu/drm/i915/intel_region_lmem.h +++ b/drivers/gpu/drm/i915/intel_region_lmem.h @@ -24,4 +24,7 @@ i915_gem_object_create_lmem(struct drm_i915_private *i915, resource_size_t size, unsigned int flags); +struct intel_memory_region * +i915_gem_setup_fake_lmem(struct drm_i915_private *i915); + #endif /* !__INTEL_REGION_LMEM_H */ -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx