[PATCH 2/5] drm/i915: make waiting trace events more useful

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On Mon, Apr 30, 2012 at 06:40:23PM -0700, Ben Widawsky wrote:
> v2: Don't do a trace event per loop. (Chris)
> Only get blocking/non-blocking info (Chris)
> 
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_trace.h |   22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index dac7bba..efdf322 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -311,9 +311,27 @@ DEFINE_EVENT(i915_gem_request, i915_gem_request_retire,
>  	    TP_ARGS(ring, seqno)
>  );
>  
> -DEFINE_EVENT(i915_gem_request, i915_gem_request_wait_begin,
> +TRACE_EVENT(i915_gem_request_wait_begin,
>  	    TP_PROTO(struct intel_ring_buffer *ring, u32 seqno),
> -	    TP_ARGS(ring, seqno)
> +	    TP_ARGS(ring, seqno),
> +
> +	    TP_STRUCT__entry(
> +			     __field(u32, dev)
> +			     __field(u32, ring)
> +			     __field(u32, seqno)
> +			     __field(bool, blocking)
> +			     ),
> +
> +	    TP_fast_assign(
> +			   __entry->dev = ring->dev->primary->index;
> +			   __entry->ring = ring->id;
> +			   __entry->seqno = seqno;
> +			   __entry->blocking =  mutex_is_locked(&ring->dev->struct_mutex);

For consistency I guess we can ditch the dev parameter (and even then, the
ring would uniquely identify the device). Also, I guess you need to
explicitly pass in blocking, because mutex_is_locked is rather racy -
someone else could hold the mutex while we're waiting in a non-blocking
fashion.
-Daniel

> +			   ),
> +
> +	    TP_printk("dev=%u, ring=%u, seqno=%u, blocking=%s",
> +		      __entry->dev, __entry->ring, __entry->seqno,
> +		      __entry->blocking ?  "yes" : "no")
>  );
>  
>  DEFINE_EVENT(i915_gem_request, i915_gem_request_wait_end,
> -- 
> 1.7.10
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48


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