On Fri, Apr 27, 2012 at 06:36:37PM +0100, Chris Wilson wrote:
> Currently we call gen6_enable_rps() (which writes into the per-ring
> register mmio space) from intel_modeset_init_hw() which is called before
> we initialise the rings. If we defer intel_modeset_init_hw() until
> afterwards (in the intel_modeset_gem_init() phase) all is well.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
One thing I've noticed that with this patch we still have conflicting
ordering of gem_init_hw vs. modeset_init_hw. With this patch we have
- gem before modeset init_hw for initial load and after gpu reset
- but gem _after_ modeset init_hw after resume.
Given that we already have another workaround that wants gem (and the
rings) fully running, I guess gem before modeset init_hw is the right
order. Care to amend the patch to fix the resume path?
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index be59e8f..27eda9a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6792,6 +6792,7 @@ void intel_modeset_init_hw(struct drm_device *dev)
>
> if (IS_IRONLAKE_M(dev)) {
> ironlake_enable_drps(dev);
> + ironlake_enable_rc6(dev);
> intel_init_emon(dev);
> }
>
> @@ -6849,8 +6850,6 @@ void intel_modeset_init(struct drm_device *dev)
> i915_disable_vga(dev);
> intel_setup_outputs(dev);
>
> - intel_modeset_init_hw(dev);
> -
> INIT_WORK(&dev_priv->idle_work, intel_idle_update);
> setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,
> (unsigned long)dev);
> @@ -6861,8 +6860,7 @@ void intel_modeset_init(struct drm_device *dev)
>
> void intel_modeset_gem_init(struct drm_device *dev)
> {
> - if (IS_IRONLAKE_M(dev))
> - ironlake_enable_rc6(dev);
> + intel_modeset_init_hw(dev);
>
> intel_setup_overlay(dev);
> }
> --
> 1.7.10
>
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--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
