On Sat, 31 Mar 2012 11:21:57 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote: > According to an internal workaround master list, we need to set bit 5 > of register 9400 to avoid issues with color blits. This sounds like it could be the root cause behind the FBC + BLT hangs. But not the XY_COPY hangs. -Chris -- Chris Wilson, Intel Open Source Technology Centre
