On Thu, Mar 29, 2012 at 12:32:30PM -0300, Eugeni Dodonov wrote:
> With Lynx Point, we need to use SBI to communicate with the display clock
> control. This commit adds helper functions to access the registers via
> SBI.
>
> v2: de-inline the function and address changes in bits names
>
> v1 Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
The corresponding stuff from vlv is protected by dpio_lock. I think just
for paranoia and consistency it would make sense to do the same in the sbi
read/write helpers. I think you could just reuse the dpio_lock (with
irqsafe spinlock variants).
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 44 ++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a0e3166..8e5f5be 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1220,6 +1220,50 @@ static void intel_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
> POSTING_READ(reg);
> }
>
> +/* SBI access */
> +static void
> +intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value)
> +{
> + if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_READY) == 0,
> + 10))
> + DRM_ERROR("timeout waiting for SBI to become ready\n");
> +
> + I915_WRITE(SBI_ADDR,
> + (reg << 16));
> + I915_WRITE(SBI_DATA,
> + value);
> + I915_WRITE(SBI_CTL_STAT,
> + SBI_BUSY |
> + SBI_CTL_OP_CRWR);
> +
> + if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_READY | SBI_RESPONSE_SUCCESS)) == 0,
> + 10))
> + DRM_ERROR("timeout waiting for SBI to complete write transaction\n");
> +}
> +
> +static u32
> +intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg)
> +{
> + u32 value;
> + if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_READY) == 0,
> + 10))
> + DRM_ERROR("timeout waiting for SBI to become ready\n");
> +
> + I915_WRITE(SBI_ADDR,
> + (reg << 16));
> + I915_WRITE(SBI_CTL_STAT,
> + SBI_BUSY |
> + SBI_CTL_OP_CRRD);
> +
> + if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_READY | SBI_RESPONSE_SUCCESS)) == 0,
> + 10))
> + DRM_ERROR("timeout waiting for SBI to complete read transaction\n");
> +
> + value = I915_READ(SBI_DATA);
> +
> + return value;
> +}
> +
> /**
> * intel_enable_pch_pll - enable PCH PLL
> * @dev_priv: i915 private structure
> --
> 1.7.9.5
>
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> Intel-gfx at lists.freedesktop.org
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--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
