[PATCH 16/37] drm/i915: add port clock selection support for HSW

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Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

On Wed, Mar 21, 2012 at 10:09 PM, Eugeni Dodonov
<eugeni.dodonov at intel.com> wrote:
> Multiple clocks can drive different outputs.
>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
> ---
> ?drivers/gpu/drm/i915/i915_reg.h | ? 23 +++++++++++++++++++++++
> ?1 file changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e38dafc..eebe9d3 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3971,4 +3971,27 @@
> ?#define ?SPLL_PLL_FREQ_810MHz ?(0<<26)
> ?#define ?SPLL_PLL_FREQ_1350MHz (1<<26)
>
> +/* Port clock selection */
> +#define PORT_CLK_SEL_A ? ? ? ? ? ? ? ? 0x46100
> +#define PORT_CLK_SEL_B ? ? ? ? ? ? ? ? 0x46104
> +#define PORT_CLK_SEL_C ? ? ? ? ? ? ? ? 0x46108
> +#define PORT_CLK_SEL_D ? ? ? ? ? ? ? ? 0x4610C
> +#define PORT_CLK_SEL_E ? ? ? ? ? ? ? ? 0x46110
> +#define ?PORT_CLK_SEL_LCPLL_2700 ? ? ? (0<<29)
> +#define ?PORT_CLK_SEL_LCPLL_1350 ? ? ? (1<<29)
> +#define ?PORT_CLK_SEL_LCPLL_810 ? ? ? ? ? ? ? ?(2<<29)
> +#define ?PORT_CLK_SEL_SPLL ? ? ? ? ? ? ? ? ? ? (3<<29)
> +#define ?PORT_CLK_SEL_WRPLL1 ? ? ? ? ? (4<<29)
> +#define ?PORT_CLK_SEL_WRPLL2 ? ? ? ? ? (5<<29)
> +
> +/* Pipe clock selection */
> +#define PIPE_CLK_SEL_A ? ? ? ? ? ? ? ? 0x46140
> +#define PIPE_CLK_SEL_B ? ? ? ? ? ? ? ? 0x46144
> +#define PIPE_CLK_SEL(pipe) _PIPE(pipe, \
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? PIPE_CLK_SEL_A, \
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? PIPE_CLK_SEL_B)
> +#define ?PIPE_CLK_SEL_DDIB ? ? ? ? ? ? (2<<29)
> +#define ?PIPE_CLK_SEL_DDIC ? ? ? ? ? ? (3<<29)
> +#define ?PIPE_CLK_SEL_DDID ? ? ? ? ? ? (4<<29)
> +#define ?PIPE_CLK_SEL_DDIE ? ? ? ? ? ? (5<<29)
> ?#endif /* _I915_REG_H_ */
> --
> 1.7.9.2
>
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> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
GPG: 0x905BE242 @ wwwkeys.pgp.net


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