[PATCH 2/3] drm/i915: extract intel_enable_rc6()

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On Sat, Mar 24, 2012 at 07:09:45PM -0700, Ben Widawsky wrote:
> nice to have elsewhere
> 
> CC: Eugeni Dodonov <eugeni.dodonov at intel.com>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>

I was momentarily confused with this commit message, until I've noticed
that you need this in the next patch (I've assumed Eugeni needs to for
something). So please slightly elaborate on the reasons for this.

Also I've wondered whether we shouldn't filter the individual rc6 levels?
Or are all counters sane once you enable at least one of the rc6 levels?
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_drv.h      |    1 +
>  drivers/gpu/drm/i915/intel_display.c |    2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index bbbc1a4..22ab4db 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1414,6 +1414,7 @@ extern void ironlake_enable_rc6(struct drm_device *dev);
>  extern void gen6_set_rps(struct drm_device *dev, u8 val);
>  extern void intel_detect_pch(struct drm_device *dev);
>  extern int intel_trans_dp_port_sel(struct drm_crtc *crtc);
> +extern int intel_enable_rc6(const struct drm_device *dev);
>  
>  extern void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
>  extern void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index ab62c96..efbf709 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8235,7 +8235,7 @@ void intel_init_emon(struct drm_device *dev)
>  	dev_priv->corr = (lcfuse & LCFUSE_HIV_MASK);
>  }
>  
> -static int intel_enable_rc6(struct drm_device *dev)
> +int intel_enable_rc6(const struct drm_device *dev)
>  {
>  	/*
>  	 * Respect the kernel parameter if it is set
> -- 
> 1.7.9.4
> 
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> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48


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