Hi Vivek, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20190404] [cannot apply to v5.1-rc3] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Vivek-Kasireddy/drm-i915-ehl-Add-support-for-DPLL4-v2/20190405-110752 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-allyesconfig (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): drivers/gpu/drm/i915/intel_dpll_mgr.c: In function 'ehl_get_dpll': >> drivers/gpu/drm/i915/intel_dpll_mgr.c:2907:8: error: too many arguments to function 'icl_calc_mg_pll_state' ret = icl_calc_mg_pll_state(crtc_state, false); ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/intel_dpll_mgr.c:2649:13: note: declared here static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state) ^~~~~~~~~~~~~~~~~~~~~ vim +/icl_calc_mg_pll_state +2907 drivers/gpu/drm/i915/intel_dpll_mgr.c 2872 2873 static struct intel_shared_dpll * 2874 ehl_get_dpll(struct intel_crtc_state *crtc_state, 2875 struct intel_encoder *encoder) 2876 { 2877 struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); 2878 struct intel_shared_dpll *pll; 2879 enum port port = encoder->port; 2880 enum intel_dpll_id min, max; 2881 bool ret; 2882 2883 if (!intel_port_is_combophy(dev_priv, port)) { 2884 MISSING_CASE(port); 2885 return NULL; 2886 } 2887 2888 min = DPLL_ID_ICL_DPLL0; 2889 max = DPLL_ID_ICL_DPLL1; 2890 ret = icl_calc_dpll_state(crtc_state, encoder); 2891 if (ret) { 2892 pll = intel_find_shared_dpll(crtc_state, min, max); 2893 if (pll) { 2894 intel_reference_shared_dpll(pll, crtc_state); 2895 return pll; 2896 } 2897 } else { 2898 DRM_DEBUG_KMS("Could not calculate PLL state.\n"); 2899 } 2900 2901 if (encoder->type == INTEL_OUTPUT_EDP) { 2902 DRM_DEBUG_KMS("Cannot use DPLL4 with EDP.\n"); 2903 return NULL; 2904 } 2905 2906 min = max = DPLL_ID_ICL_MGPLL1; > 2907 ret = icl_calc_mg_pll_state(crtc_state, false); 2908 if (!ret) { 2909 DRM_DEBUG_KMS("Could not calculate PLL state.\n"); 2910 return NULL; 2911 } 2912 2913 pll = intel_find_shared_dpll(crtc_state, min, max); 2914 if (!pll) { 2915 DRM_DEBUG_KMS("No PLL selected\n"); 2916 return NULL; 2917 } 2918 2919 intel_reference_shared_dpll(pll, crtc_state); 2920 return pll; 2921 } 2922 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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