Read back the pixel fomrat register and get the bpp.
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
---
drivers/gpu/drm/i915/icl_dsi.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index db6bc3d..69cd6b2 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -1226,6 +1226,30 @@ static void gen11_dsi_get_timings(struct intel_encoder *encoder,
adjusted_mode->crtc_vsync_end = ((tmp >> 16) & 0xffff) + 1;
}
+enum mipi_dsi_pixel_format
+gen11_dsi_get_pixel_fmt(struct drm_i915_private *dev_priv,
+ struct intel_crtc_state *pipe_config)
+{
+ u32 tmp;
+ /* get config for dsi0 transcoder only */
+ enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
+
+ tmp = I915_READ(DSI_TRANS_FUNC_CONF(cpu_transcoder));
+ tmp &= PIX_FMT_MASK;
+
+ switch (tmp) {
+ default:
+ case PIX_FMT_RGB565:
+ return MIPI_DSI_FMT_RGB565;
+ case PIX_FMT_RGB666_PACKED:
+ return MIPI_DSI_FMT_RGB666_PACKED;
+ case PIX_FMT_RGB666_LOOSE:
+ return MIPI_DSI_FMT_RGB666;
+ case PIX_FMT_RGB888:
+ return MIPI_DSI_FMT_RGB888;
+ }
+}
+
static void gen11_dsi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
@@ -1238,6 +1262,9 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk;
gen11_dsi_get_timings(encoder, pipe_config);
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
+ pipe_config->pipe_bpp = mipi_dsi_pixel_format_to_bpp
+ (gen11_dsi_get_pixel_fmt(dev_priv,
+ pipe_config));
}
static int gen11_dsi_compute_config(struct intel_encoder *encoder,
@@ -1253,6 +1280,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
struct drm_display_mode *adjusted_mode =
&pipe_config->base.adjusted_mode;
+ pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
intel_pch_panel_fitting(crtc, pipe_config, conn_state->scaling_mode);
--
1.9.1
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