On Wed, 2019-03-20 at 11:48 -0700, Stuart Summers wrote:
> Currently, the subslice_mask runtime parameter is stored as an
> array of subslices per slice. Expand the subslice mask array to
> better match what is presented to userspace through the
> I915_QUERY_TOPOLOGY_INFO ioctl. The index into this array is
> then calculated:
> slice * subslice stride + subslice index / 8
>
> Signed-off-by: Stuart Summers <stuart.summers@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 7 +++++--
> drivers/gpu/drm/i915/i915_drv.c | 7 +++++--
> drivers/gpu/drm/i915/intel_device_info.c | 24 ++++++++++++++++++++
> ----
> drivers/gpu/drm/i915/intel_device_info.h | 11 +++++++++--
> 4 files changed, 39 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 1b3fd36ce20c..a682755c954b 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -4036,7 +4036,8 @@ static void gen10_sseu_device_status(struct
> drm_i915_private *dev_priv,
> #define SS_MAX 6
> const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
> u32 s_reg[SS_MAX], eu_reg[2 * SS_MAX], eu_mask[2];
> - int s, ss;
> + int s, ss, ss_idx;
> + u8 ss_stride = GEN_SSEU_STRIDE(info->sseu.max_subslices);
>
> for (s = 0; s < info->sseu.max_slices; s++) {
> /*
> @@ -4066,7 +4067,9 @@ static void gen10_sseu_device_status(struct
> drm_i915_private *dev_priv,
> continue;
>
> sseu->slice_mask |= BIT(s);
> - sseu->subslice_mask[s] = info->sseu.subslice_mask[s];
> + ss_idx = ss_stride * s;
> + memcpy(sseu->subslice_mask + ss_idx,
> + info->sseu.subslice_mask + ss_idx, ss_stride);
>
> for (ss = 0; ss < info->sseu.max_subslices; ss++) {
> unsigned int eu_cnt;
> diff --git a/drivers/gpu/drm/i915/i915_drv.c
> b/drivers/gpu/drm/i915/i915_drv.c
> index a1eb4f47cb1d..8b0618a87a39 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -313,8 +313,9 @@ static int i915_getparam_ioctl(struct drm_device
> *dev, void *data,
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct pci_dev *pdev = dev_priv->drm.pdev;
> struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
> + u8 ss_stride = GEN_SSEU_STRIDE(sseu->max_subslices);
> drm_i915_getparam_t *param = data;
> - int value;
> + int value = 0;
>
> switch (param->param) {
> case I915_PARAM_IRQ_ACTIVE:
> @@ -443,7 +444,9 @@ static int i915_getparam_ioctl(struct drm_device
> *dev, void *data,
> return -ENODEV;
> break;
> case I915_PARAM_SUBSLICE_MASK:
> - value = sseu->subslice_mask[0];
> + /* Only copy bits from the first subslice */
> + memcpy(&value, sseu->subslice_mask,
> + min(ss_stride, (u8)sizeof(value)));
> if (!value)
> return -ENODEV;
> break;
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> b/drivers/gpu/drm/i915/intel_device_info.c
> index 2dec370eeac7..36c869c2db49 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -83,17 +83,32 @@ void intel_device_info_dump_flags(const struct
> intel_device_info *info,
> #undef PRINT_FLAG
> }
>
> +static u8 *
> +subslice_per_slice_str(u8 *buf, const struct sseu_dev_info *sseu, u8
> slice)
> +{
> + int i;
> + u8 ss_stride = GEN_SSEU_STRIDE(sseu->max_subslices);
> + u8 *temp = buf;
> +
> + for (i = slice * ss_stride; i < ss_stride; i++, temp += 2)
Sorry for the churn here. This loop is clearly wrong. Please hold off
on this review until I have a fix posted.
Thanks,
Stuart
> + sprintf(temp, "%02x",
> + sseu->subslice_mask[slice * ss_stride + i]);
> +
> + return buf;
> +}
> +
> static void sseu_dump(const struct sseu_dev_info *sseu, struct
> drm_printer *p)
> {
> int s;
> + u8 buf[256];
>
> drm_printf(p, "slice total: %u, mask=%04x\n",
> hweight8(sseu->slice_mask), sseu->slice_mask);
> drm_printf(p, "subslice total: %u\n",
> sseu_subslice_total(sseu));
> for (s = 0; s < sseu->max_slices; s++) {
> - drm_printf(p, "slice%d: %u subslices, mask=%04x\n",
> + drm_printf(p, "slice%d: %u subslices, mask=%s\n",
> s, sseu_subslices_per_slice(sseu, s),
> - sseu->subslice_mask[s]);
> + subslice_per_slice_str(buf, sseu, s));
> }
> drm_printf(p, "EU total: %u\n", sseu->eu_total);
> drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice);
> @@ -117,6 +132,7 @@ void intel_device_info_dump_topology(const struct
> sseu_dev_info *sseu,
> struct drm_printer *p)
> {
> int s, ss;
> + u8 buf[256];
>
> if (sseu->max_slices == 0) {
> drm_printf(p, "Unavailable\n");
> @@ -124,9 +140,9 @@ void intel_device_info_dump_topology(const struct
> sseu_dev_info *sseu,
> }
>
> for (s = 0; s < sseu->max_slices; s++) {
> - drm_printf(p, "slice%d: %u subslice(s) (0x%hhx):\n",
> + drm_printf(p, "slice%d: %u subslice(s) (0x%s):\n",
> s, sseu_subslices_per_slice(sseu, s),
> - sseu->subslice_mask[s]);
> + subslice_per_slice_str(buf, sseu, s));
>
> for (ss = 0; ss < sseu->max_subslices; ss++) {
> u16 enabled_eus = sseu_get_eus(sseu, s, ss);
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h
> b/drivers/gpu/drm/i915/intel_device_info.h
> index 9a1f13521d9a..29de86bf9236 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -125,10 +125,11 @@ enum intel_ppgtt_type {
> #define GEN_MAX_SLICES (6) /* CNL upper bound */
> #define GEN_MAX_SUBSLICES (8) /* ICL upper bound */
> #define GEN_SSEU_STRIDE(bits) DIV_ROUND_UP(bits, BITS_PER_BYTE)
> +#define GEN_MAX_SUBSLICE_STRIDE GEN_SSEU_STRIDE(GEN_MAX_SUBSLICES)
>
> struct sseu_dev_info {
> u8 slice_mask;
> - u8 subslice_mask[GEN_MAX_SLICES];
> + u8 subslice_mask[GEN_MAX_SLICES * GEN_MAX_SUBSLICE_STRIDE];
> u16 eu_total;
> u8 eu_per_subslice;
> u8 min_eu_in_pool;
> @@ -235,7 +236,13 @@ static inline unsigned int
> sseu_subslice_total(const struct sseu_dev_info *sseu)
> static inline unsigned int
> sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice)
> {
> - return hweight8(sseu->subslice_mask[slice]);
> + unsigned int i, total = 0;
> + u8 ss_stride = GEN_SSEU_STRIDE(sseu->max_subslices);
> +
> + for (i = 0; i < ss_stride; i++)
> + total += hweight8(sseu->subslice_mask[slice * ss_stride
> + i]);
> +
> + return total;
> }
>
> static inline int sseu_eu_idx(const struct sseu_dev_info *sseu,
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