On Fri, Jun 15, 2012 at 11:55:21AM -0700, Jesse Barnes wrote: > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org> > --- > drivers/gpu/drm/i915/intel_pm.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index d0ce2a5..4fa1a78 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3474,6 +3474,13 @@ static void valleyview_init_clock_gating(struct drm_device *dev) > > I915_WRITE(CACHE_MODE_1, > _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE)); > + > + /* > + * On ValleyView, the GUnit needs to signal the GT > + * when flip and other events complete. So enable > + * all the GUnit->GT interrupts here > + */ > + I915_WRITE(VLV_DPFLIPSTAT, 0x3f7f0000); ... can we have less magic here, please? Not that anyone but you seems to have access to docs :( -Daniel > } > > static void g4x_init_clock_gating(struct drm_device *dev) > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel at ffwll.ch Mobile: +41 (0)79 365 57 48
