On Tue, 5 Jun 2012 10:56:58 +0200 Daniel Vetter <daniel at ffwll.ch> wrote: > On Wed, May 23, 2012 at 02:02:00PM +0200, Daniel Vetter wrote: > > Or at least plug another gapping hole. Apparrently hw desingers only > > moved the bit field, but did not bother ot re-enumerate the planes > > when adding support for a 3rd pipe. > > > > Discovered by i-g-t/flip_test. > > > > This may or may not fix the reference bugzilla, because that one > > smells like we have still larger fish to fry. > > > > v2: Fixup the impossible case to catch programming errors, noticed by > > Chris Wilson. > > > > References: https://bugs.freedesktop.org/show_bug.cgi?id=50069 > > Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch> > > Ping for review and maybe a tested-by. This fixes i-g-t/tests/flip_test on > my ivb, but for some strange reasons QA can't confirm that. Still, I'd > like to push this patch to -fixes. Eugeni, Ben? > > Thanks, Daniel I'm starting to review it. I need to do some background reading first. > > > --- > > drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++ > > drivers/gpu/drm/i915/intel_display.c | 19 ++++++++++++++++++- > > 2 files changed, 26 insertions(+), 1 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 2d49b95..76bc275 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -210,6 +210,14 @@ > > #define MI_DISPLAY_FLIP MI_INSTR(0x14, 2) > > #define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1) > > #define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20) > > +/* IVB has funny definitions for which plane to flip. */ > > +#define MI_DISPLAY_FLIP_IVB_PLANE_A (0 << 19) > > +#define MI_DISPLAY_FLIP_IVB_PLANE_B (1 << 19) > > +#define MI_DISPLAY_FLIP_IVB_SPRITE_A (2 << 19) > > +#define MI_DISPLAY_FLIP_IVB_SPRITE_B (3 << 19) > > +#define MI_DISPLAY_FLIP_IVB_PLANE_C (4 << 19) > > +#define MI_DISPLAY_FLIP_IVB_SPRITE_C (5 << 19) > > + > > #define MI_SET_CONTEXT MI_INSTR(0x18, 0) > > #define MI_MM_SPACE_GTT (1<<8) > > #define MI_MM_SPACE_PHYSICAL (0<<8) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > index 67ed819..9a6e819 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -6158,17 +6158,34 @@ static int intel_gen7_queue_flip(struct drm_device *dev, > > struct drm_i915_private *dev_priv = dev->dev_private; > > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > > struct intel_ring_buffer *ring = &dev_priv->ring[BCS]; > > + uint32_t plane_bit = 0; > > int ret; > > > > ret = intel_pin_and_fence_fb_obj(dev, obj, ring); > > if (ret) > > goto err; > > > > + switch(intel_crtc->plane) { > > + case PLANE_A: > > + plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_A; > > + break; > > + case PLANE_B: > > + plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_B; > > + break; > > + case PLANE_C: > > + plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_C; > > + break; > > + default: > > + WARN_ONCE(1, "unknown plane in flip command\n"); > > + ret = -ENODEV; > > + goto err; > > + } > > + > > ret = intel_ring_begin(ring, 4); > > if (ret) > > goto err_unpin; > > > > - intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)); > > + intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit); > > intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode)); > > intel_ring_emit(ring, (obj->gtt_offset)); > > intel_ring_emit(ring, (MI_NOOP)); > > -- > > 1.7.9 > > > -- Ben Widawsky, Intel Open Source Technology Center
