On Wed, 25 Jul 2012 21:32:09 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote: > The power docs say that when the gt leaves rc6, it is in the lowest > frequency and only about 25 usec later will switch to the frequency > selected in GEN6_RPNSWREQ. If the downclock limit expires in that > window and the down limit is set to the lowest possible frequency, the > hw will not send the down interrupt. Which leads to a too high gpu > clock and wasted power. > > Chris Wilson already worked on this with > > commit 7b9e0ae6da0a7eaf2680a1a788f08df123724f3b > Author: Chris Wilson <chris at chris-wilson.co.uk> > Date: Sat Apr 28 08:56:39 2012 +0100 > > drm/i915: Always update RPS interrupts thresholds along with > frequency > > but got the logic inverted: The current code set the down limit as > long as we haven't reached it. Instead of only once with reached the > lowest frequency. Yup, that's different to the opposite of what I thought I was writing to comply with the guide. :( Note you also have to fix up intel_sanitize_pm(). -Chris -- Chris Wilson, Intel Open Source Technology Centre
