The DDI eDP/pipe A/B/C transcoders must be enabled whenever we observe the DDI buffer of the port connected to them to be enabled (via DDI_BUF_CTL). Add a consistency check for this to the HW readout code of these transcoders. Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_ddi.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index ad11540ac436..0476d1d33bfb 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2029,6 +2029,8 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder, if (port == PORT_A) { tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP)); + WARN_ON(!(tmp & TRANS_DDI_FUNC_ENABLE)); + switch (tmp & TRANS_DDI_EDP_INPUT_MASK) { default: MISSING_CASE(tmp & TRANS_DDI_EDP_INPUT_MASK); @@ -2057,6 +2059,8 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder, if ((tmp & TRANS_DDI_PORT_MASK) != TRANS_DDI_SELECT_PORT(port)) continue; + WARN_ON(!(tmp & TRANS_DDI_FUNC_ENABLE)); + if ((tmp & TRANS_DDI_MODE_SELECT_MASK) == TRANS_DDI_MODE_SELECT_DP_MST) mst_pipe_mask |= BIT(p); -- 2.13.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx