On 7/5/2012 7:02 AM, Chris Wilson wrote: > There is little point waking up every 10ms to service an interrupt which > we then promptly ignore. So only program the the PMIER to enable > interrupts for those events which we do handle, not all of them! > > Signed-off-by: Chris Wilson<chris at chris-wilson.co.uk> > Cc: Jesse Barnes<jbarnes at virtuousgeek.org> > Cc: Eugeni Dodonov<eugeni.dodonov at intel.com> > Cc: Ben Widawsky<ben at bwidawsk.net> > --- > drivers/gpu/drm/i915/intel_pm.c | 9 +-------- > 1 file changed, 1 insertion(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 0e27e95..53df531 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2491,14 +2491,7 @@ static void gen6_enable_rps(struct drm_device *dev) > gen6_set_rps(dev_priv->dev, (gt_perf_status& 0xff00)>> 8); > > /* requires MSI enabled */ > - I915_WRITE(GEN6_PMIER, > - GEN6_PM_MBOX_EVENT | > - GEN6_PM_THERMAL_EVENT | > - GEN6_PM_RP_DOWN_TIMEOUT | > - GEN6_PM_RP_UP_THRESHOLD | > - GEN6_PM_RP_DOWN_THRESHOLD | > - GEN6_PM_RP_UP_EI_EXPIRED | > - GEN6_PM_RP_DOWN_EI_EXPIRED); > + I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS); > spin_lock_irq(&dev_priv->rps_lock); > WARN_ON(dev_priv->pm_iir != 0); > I915_WRITE(GEN6_PMIMR, 0); Yeah looks good to me, though like Ben said these other ones could be fun at some point. Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>
