Re: [PATCH 06/10] drm/i915/icl: Mark TC port as safe when interruptions are disabled

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Tue, Oct 02, 2018 at 10:50:50AM -0700, José Roberto de Souza wrote:
> Before enter in power saving states or before unload the driver
> spec states that display driver is required to to mark TC ports as
> safe so hardware can do the disconnection flow without wait for
> display driver handshake.
> When driver is resumed or loaded again, if the TC live state is
> still set as connected driver will mark again TC port as not safe as
> required by spec.
> 
> BSpec: 2175
> 
> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 2e242270e270..58616690f45f 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3640,6 +3640,7 @@ static void gen11_irq_reset(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	int pipe;
> +	u32 val;
>  
>  	I915_WRITE(GEN11_GFX_MSTR_IRQ, 0);
>  	POSTING_READ(GEN11_GFX_MSTR_IRQ);
> @@ -3661,6 +3662,15 @@ static void gen11_irq_reset(struct drm_device *dev)
>  
>  	if (HAS_PCH_ICP(dev_priv))
>  		GEN3_IRQ_RESET(SDE);
> +
> +	/*
> +	 * Mark TC ports as safe so hardware can do the disconnect flow without
> +	 * wait for driver to do the handshake
> +	 */
> +	val = I915_READ(PORT_TX_DFLEXDPCSSS);
> +	for (pipe = 0; pipe < 4; pipe++)
> +		val &= ~(DP_PHY_MODE_STATUS_NOT_SAFE(pipe));
> +	I915_WRITE(PORT_TX_DFLEXDPCSSS, val);

Why would we have to do this here? The driver should relinquish control
if and when it has shut down the pipes etc. Sounds like a bug if we're
hanging on when we have no need for the port.

>  }
>  
>  void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
> -- 
> 2.19.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx




[Index of Archives]     [AMD Graphics]     [Linux USB Devel]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux