Quoting Lionel Landwerlin (2018-08-30 12:55:32) > + if (INTEL_GEN(dev_priv) >= 8) { > + struct intel_engine_cs *engine; > + enum intel_engine_id id; > + > + for_each_engine(engine, dev_priv, id) { > + I915_WRITE(RING_FAULT_REG(engine), > + I915_READ(RING_FAULT_REG(engine)) & > + ~RING_FAULT_VALID); > + } > + POSTING_READ(RING_FAULT_REG(dev_priv->engine[RCS])); > + } else if (INTEL_GEN(dev_priv) >= 6) { > + I915_WRITE(GEN8_RING_FAULT_REG, > + I915_READ(GEN8_RING_FAULT_REG) & ~RING_FAULT_VALID); > + POSTING_READ(GEN8_RING_FAULT_REG); > + } Reversed! gen8 has the single reg, gen6 has one per engine. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx