On 02/03/2012 12:22 PM, Eugeni Dodonov wrote:
> This adds two cache-related workarounds for Ivy Bridge which can lead to 3D
> ring hangs and corruptions.
>
> Signed-off-by: Eugeni Dodonov<eugeni.dodonov at intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 7 +++++++
> drivers/gpu/drm/i915/intel_display.c | 6 ++++++
> 2 files changed, 13 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 80fd6b5..92274b1 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3028,6 +3028,13 @@
> #define DISP_TILE_SURFACE_SWIZZLING (1<<13)
> #define DISP_FBC_WM_DIS (1<<15)
>
> +/* GEN7 chicken */
> +#define GEN7_COMMON_SLICE_CHICKEN1 0x7010
> +#define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C4FFF8C
> +
> +#define GEN7_L3_CHICKEN_MODE_REGISTER 0xB030
> +#define GEN7_WA_L3_CHICKEN_MODE 0x20000000
> +
> /* PCH */
>
> /* south display engine interrupt */
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a72100f..49e5870 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8445,6 +8445,12 @@ static void gen6_init_clock_gating(struct drm_device *dev)
> ILK_DPARB_CLK_GATE |
> ILK_DPFD_CLK_GATE);
>
> + /* IVB workarounds */
> + I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
> + GEN7_WA_FOR_GEN7_L3_CONTROL);
> + I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
> + GEN7_WA_L3_CHICKEN_MODE);
> +
> for_each_pipe(pipe) {
> I915_WRITE(DSPCNTR(pipe),
> I915_READ(DSPCNTR(pipe)) |
Also, shouldn't these be in the ivybridge_init_clock_gating function,
not gen6? These are clearly Gen7 registers.
