>> >> > Ack on the general idea though; I'd like us to be able to run under Xen >> >> > without modification. >> >> > >> >> >> >> Stefano may be able to comment if it's feasible to achieve zero >> >> modification in this case. >> >> I believe this has something to do with getting rid of the PIIX3 >> >> device provided by qemu. >> >> >> >> But generally I think it's very hard to achieve perfect emulation. >> >> You can't always foresee what assumption a guest driver would make. >> >> Maybe we need some compromise. >> > >> > I meant that I'd like to see any other patches required for Xen get >> > merged, that way people won't have to patch their kernels for i915 >> > under Xen. >> >> Hi Jesse, I think I need to resend the patch with proper comment to >> have it formally accepted. >> Any guide line for formal patch submission? Do I need to start a >> separate thread? > > No, just cc Daniel Vetter. > > -- > Jesse Barnes, Intel Open Source Technology Center Thanks, Resend with updated patch && Daniel involved. Also include the background info for easy reading. In XEN HVM guest, there is always an emulated PIIX3 ISA bridge on slot 01.0. This shadows the PCH ISA bridge on 1f.0 with the current intel_detect_pch() implementation. The issue can be easily solved by looping through all the ISA bridges until the first match is found, instead of just check against the first one. Against torvalds tree 3.8-rc1 (a49f0d1) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 530db83..8f949c1 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -406,11 +406,18 @@ void intel_detect_pch(struct drm_device *dev) * make graphics device passthrough work easy for VMM, that only * need to expose ISA bridge to let driver know the real hardware * underneath. This is a requirement from virtualization team. + * + * In some virtualized environments (e.g. XEN), there is irrelevant + * ISA bridge in the system. To work reliably, we should scan trhough + * all the ISA bridge devices and check for the first match, instead + * of only checking the first one. */ pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); - if (pch) { + while (pch) { + struct pci_dev * curr = pch; if (pch->vendor == PCI_VENDOR_ID_INTEL) { unsigned short id; + unsigned found = 1; id = pch->device & INTEL_PCH_DEVICE_ID_MASK; dev_priv->pch_id = id; @@ -440,10 +447,20 @@ void intel_detect_pch(struct drm_device *dev) dev_priv->num_pch_pll = 0; DRM_DEBUG_KMS("Found LynxPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev)); + } else { + found = 0; + } + if (found) { + BUG_ON(dev_priv->num_pch_pll > I915_NUM_PLLS); + pci_dev_put(pch); + break; } - BUG_ON(dev_priv->num_pch_pll > I915_NUM_PLLS); } - pci_dev_put(pch); + pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, curr); + pci_dev_put(curr); + } + if (!pch) { + DRM_DEBUG_KMS("No PCH found?\n"); } }