On Mon, Dec 17, 2012 at 09:43:37AM -0200, Rodrigo Vivi wrote:
> I checked wadatabase and bspec and agree with your understanding, so
> feel free to use:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
Chris spotted that I've missed the server GT1. Patch fixed up locally.
-Daniel
>
>
>
> On Fri, Dec 14, 2012 at 8:38 PM, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> > I'm not really sure, since the w/a entry is as thin on details as
> > ever, and Bspec doesn't say anything about it. But I've figured only
> > dispatching to rows 0&1 instead of all four should be the right thing
> > for GT1.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 2 ++
> > drivers/gpu/drm/i915/i915_reg.h | 3 ++-
> > drivers/gpu/drm/i915/intel_pm.c | 5 +++++
> > 3 files changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 514aee8..84be497 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1196,6 +1196,8 @@ struct drm_i915_file_private {
> > #define IS_IVB_GT1(dev) ((dev)->pci_device == 0x0156 || \
> > (dev)->pci_device == 0x0152 || \
> > (dev)->pci_device == 0x015a)
> > +#define IS_SNB_GT1(dev) ((dev)->pci_device == 0x0102 || \
> > + (dev)->pci_device == 0x0106)
> > #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)
> > #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell)
> > #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index d72744e..4abf4f9 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -534,7 +534,8 @@
> > # define MI_FLUSH_ENABLE (1 << 12)
> >
> > #define GEN6_GT_MODE 0x20d0
> > -#define GEN6_GT_MODE_HI (1 << 9)
> > +#define GEN6_GT_MODE_HI (1 << 9)
> > +#define GEN6_TD_FOUR_ROW_DISPATCH_DISABLE (1 << 5)
> >
> > #define GFX_MODE 0x02520
> > #define GFX_MODE_GEN7 0x0229c
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 2fddd17..89324a9 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3478,6 +3478,11 @@ static void gen6_init_clock_gating(struct drm_device *dev)
> > I915_WRITE(_3D_CHICKEN,
> > _MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB));
> >
> > + /* WaSetupGtModeTdRowDispatch */
> > + if (IS_SNB_GT1(dev))
> > + I915_WRITE(GEN6_GT_MODE,
> > + _MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE));
> > +
> > I915_WRITE(WM3_LP_ILK, 0);
> > I915_WRITE(WM2_LP_ILK, 0);
> > I915_WRITE(WM1_LP_ILK, 0);
> > --
> > 1.7.10.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
