Hi This new version of the series excludes the controversial patch about the HPD connect flow. Let's reach an agreement on this part first, then we discuss what to do without having to rebase too many times the patches we already agree on. Only patches 1 and 2 need review. Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Thanks, Paulo Animesh Manna (1): drm/i915/icl: Update FIA supported lane count for hpd. Paulo Zanoni (4): drm/i915/icl: implement icl_digital_port_connected() drm/i915/icl: store the port type for TC ports drm/i915/icl: program MG_DP_MODE drm/i915/icl: toggle PHY clock gating around link training drivers/gpu/drm/i915/i915_reg.h | 46 +++++ drivers/gpu/drm/i915/intel_ddi.c | 5 + drivers/gpu/drm/i915/intel_display.h | 7 + drivers/gpu/drm/i915/intel_dp.c | 256 ++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_drv.h | 4 + 5 files changed, 316 insertions(+), 2 deletions(-) -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
