Hi
2012/11/29 Daniel Vetter <daniel.vetter at ffwll.ch>:
> This has originally been added in
>
> commit 8db9d77b1b14fd730561f64beea8c00e4478d7c5
> Author: Zhenyu Wang <zhenyuw at linux.intel.com>
> Date: Wed Apr 7 16:15:54 2010 +0800
>
> drm/i915: Support for Cougarpoint PCH display pipeline
>
> probably to combat issues with hw state left behind by the BIOS. And
> indeed, I've checked out that specific revision, and there is no DP
> support yet. So the pch dp transcoder won't be correctly disabled, and
> that's important since it requires a rether special disable dance:
> Just writing 0 to TRANS_DP_CTL won't cut it, since we need to select
> the NONE port when disabling, too.
>
> And indeed, things seem to still work, so let's just remove this.
>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Briefly tested on SNB:
- Connected DP, disconnected
- Connected HDMI, disconnected
- Connected VGA, disconnected
They all worked.
Briefly-tested-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 9 +--------
> 1 file changed, 1 insertion(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0c44421..456acd6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5345,15 +5345,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
> } else
> intel_put_pch_pll(intel_crtc);
>
> - if (is_dp && !is_cpu_edp) {
> + if (is_dp && !is_cpu_edp)
> intel_dp_set_m_n(crtc, mode, adjusted_mode);
> - } else {
> - /* For non-DP output, clear any trans DP clock recovery setting.*/
> - I915_WRITE(TRANSDATA_M1(pipe), 0);
> - I915_WRITE(TRANSDATA_N1(pipe), 0);
> - I915_WRITE(TRANSDPLINK_M1(pipe), 0);
> - I915_WRITE(TRANSDPLINK_N1(pipe), 0);
> - }
>
> for_each_encoder_on_crtc(dev, crtc, encoder)
> if (encoder->pre_pll_enable)
> --
> 1.7.11.7
>
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--
Paulo Zanoni
