From: Daniel Vetter <daniel.vetter at ffwll.ch>
This is a prep patch to stop drm/i915 from changing the LBPC registers
itself - but we still need to properly save/restore it on
suspend/resume.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/i915_suspend.c | 8 ++++++++
drivers/gpu/drm/i915/intel_panel.c | 2 --
4 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 58b43db..af1701c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -606,6 +606,7 @@ typedef struct drm_i915_private {
u32 savePP_CONTROL;
u32 savePP_DIVISOR;
u32 savePFIT_CONTROL;
+ u8 saveLBPC;
u32 save_palette_a[256];
u32 save_palette_b[256];
u32 saveDPFC_CB_BASE;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d0b60f2..3303c18 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1889,6 +1889,9 @@
#define PFIT_AUTO_RATIOS 0x61238
+/* legacy/combination backlight modes in pci config space. */
+#define PCI_LBPC 0xf4
+
/* Backlight control */
#define BLC_PWM_CTL2 0x61250 /* 965+ only */
#define BLM_PWM_ENABLE (1 << 31)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 4776ccf..05daff7 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -639,6 +639,10 @@ static void i915_save_display(struct drm_device *dev)
dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
if (IS_MOBILE(dev) && !IS_I830(dev))
dev_priv->saveLVDS = I915_READ(LVDS);
+
+ if (IS_GEN2(dev) || IS_GEN4(dev))
+ pci_read_config_byte(dev->pdev, PCI_LBPC,
+ &dev_priv->saveLBPC);
}
if (!IS_I830(dev) && !IS_845G(dev) && !HAS_PCH_SPLIT(dev))
@@ -759,6 +763,10 @@ static void i915_restore_display(struct drm_device *dev)
I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
+
+ if (IS_GEN2(dev) || IS_GEN4(dev))
+ pci_write_config_byte(dev->pdev, PCI_LBPC,
+ dev_priv->saveLBPC);
}
/* Display Port state */
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 3df4f5f..9546f97 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -33,8 +33,6 @@
#include <linux/moduleparam.h>
#include "intel_drv.h"
-#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
-
void
intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode)
--
1.7.9.5
