On Fri, Aug 24, 2012 at 12:26:05PM +0300, Jani Nikula wrote: > On Fri, 24 Aug 2012, Ben Widawsky <ben at bwidawsk.net> wrote: > > INSTDONE is used in many places, and it varies from generation to > > generation. This provides a good reason for us to extract the logic to > > read the relevant information. > > > > The patch has no functional change. It's prep for some new stuff. > > > > v2: move the memset inside of i915_get_extra_instdone (Jani) > > v3,4: bugs caught by (Jani) > > On the series, > > Reviewed-by: Jani Nikula <jani.nikula at intel.com> All 3 queued for -next, thanks for the patches and review. -Daniel > > > > > Cc: Jani Nikula <jani.nikula at intel.com> > > Signed-off-by: Ben Widawsky <ben at bwidawsk.net> > > --- > > drivers/gpu/drm/i915/i915_irq.c | 50 +++++++++++++++++++++++++---------------- > > drivers/gpu/drm/i915/i915_reg.h | 1 + > > 2 files changed, 32 insertions(+), 19 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > > index 3633029..b7ec34e 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -1070,6 +1070,23 @@ i915_error_first_batchbuffer(struct drm_i915_private *dev_priv, > > return NULL; > > } > > > > +/* NB: please notice the memset */ > > +static void i915_get_extra_instdone(struct drm_device *dev, > > + uint32_t *instdone) > > +{ > > + struct drm_i915_private *dev_priv = dev->dev_private; > > + memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); > > + > > + if (INTEL_INFO(dev)->gen < 4) { > > + instdone[0] = I915_READ(INSTDONE); > > + instdone[1] = 0; > > + } else { > > + instdone[0] = I915_READ(INSTDONE_I965); > > + instdone[1] = I915_READ(INSTDONE1); > > + } > > +} > > + > > + > > static void i915_record_ring_state(struct drm_device *dev, > > struct drm_i915_error_state *error, > > struct intel_ring_buffer *ring) > > @@ -1288,6 +1305,7 @@ void i915_destroy_error_state(struct drm_device *dev) > > static void i915_report_and_clear_eir(struct drm_device *dev) > > { > > struct drm_i915_private *dev_priv = dev->dev_private; > > + uint32_t instdone[I915_NUM_INSTDONE_REG]; > > u32 eir = I915_READ(EIR); > > int pipe; > > > > @@ -1296,16 +1314,17 @@ static void i915_report_and_clear_eir(struct drm_device *dev) > > > > pr_err("render error detected, EIR: 0x%08x\n", eir); > > > > + i915_get_extra_instdone(dev, instdone); > > + > > if (IS_G4X(dev)) { > > if (eir & (GM45_ERROR_MEM_PRIV | GM45_ERROR_CP_PRIV)) { > > u32 ipeir = I915_READ(IPEIR_I965); > > > > pr_err(" IPEIR: 0x%08x\n", I915_READ(IPEIR_I965)); > > pr_err(" IPEHR: 0x%08x\n", I915_READ(IPEHR_I965)); > > - pr_err(" INSTDONE: 0x%08x\n", > > - I915_READ(INSTDONE_I965)); > > + pr_err(" INSTDONE: 0x%08x\n", instdone[0]); > > pr_err(" INSTPS: 0x%08x\n", I915_READ(INSTPS)); > > - pr_err(" INSTDONE1: 0x%08x\n", I915_READ(INSTDONE1)); > > + pr_err(" INSTDONE1: 0x%08x\n", instdone[1]); > > pr_err(" ACTHD: 0x%08x\n", I915_READ(ACTHD_I965)); > > I915_WRITE(IPEIR_I965, ipeir); > > POSTING_READ(IPEIR_I965); > > @@ -1344,7 +1363,7 @@ static void i915_report_and_clear_eir(struct drm_device *dev) > > > > pr_err(" IPEIR: 0x%08x\n", I915_READ(IPEIR)); > > pr_err(" IPEHR: 0x%08x\n", I915_READ(IPEHR)); > > - pr_err(" INSTDONE: 0x%08x\n", I915_READ(INSTDONE)); > > + pr_err(" INSTDONE: 0x%08x\n", instdone[0]); > > pr_err(" ACTHD: 0x%08x\n", I915_READ(ACTHD)); > > I915_WRITE(IPEIR, ipeir); > > POSTING_READ(IPEIR); > > @@ -1353,10 +1372,9 @@ static void i915_report_and_clear_eir(struct drm_device *dev) > > > > pr_err(" IPEIR: 0x%08x\n", I915_READ(IPEIR_I965)); > > pr_err(" IPEHR: 0x%08x\n", I915_READ(IPEHR_I965)); > > - pr_err(" INSTDONE: 0x%08x\n", > > - I915_READ(INSTDONE_I965)); > > + pr_err(" INSTDONE: 0x%08x\n", instdone[0]); > > pr_err(" INSTPS: 0x%08x\n", I915_READ(INSTPS)); > > - pr_err(" INSTDONE1: 0x%08x\n", I915_READ(INSTDONE1)); > > + pr_err(" INSTDONE1: 0x%08x\n", instdone[1]); > > pr_err(" ACTHD: 0x%08x\n", I915_READ(ACTHD_I965)); > > I915_WRITE(IPEIR_I965, ipeir); > > POSTING_READ(IPEIR_I965); > > @@ -1671,7 +1689,7 @@ void i915_hangcheck_elapsed(unsigned long data) > > { > > struct drm_device *dev = (struct drm_device *)data; > > drm_i915_private_t *dev_priv = dev->dev_private; > > - uint32_t acthd[I915_NUM_RINGS], instdone, instdone1; > > + uint32_t acthd[I915_NUM_RINGS], instdone[I915_NUM_INSTDONE_REG]; > > struct intel_ring_buffer *ring; > > bool err = false, idle; > > int i; > > @@ -1699,25 +1717,19 @@ void i915_hangcheck_elapsed(unsigned long data) > > return; > > } > > > > - if (INTEL_INFO(dev)->gen < 4) { > > - instdone = I915_READ(INSTDONE); > > - instdone1 = 0; > > - } else { > > - instdone = I915_READ(INSTDONE_I965); > > - instdone1 = I915_READ(INSTDONE1); > > - } > > + i915_get_extra_instdone(dev, instdone); > > > > if (memcmp(dev_priv->last_acthd, acthd, sizeof(acthd)) == 0 && > > - dev_priv->last_instdone == instdone && > > - dev_priv->last_instdone1 == instdone1) { > > + dev_priv->last_instdone == instdone[0] && > > + dev_priv->last_instdone1 == instdone[1]) { > > if (i915_hangcheck_hung(dev)) > > return; > > } else { > > dev_priv->hangcheck_count = 0; > > > > memcpy(dev_priv->last_acthd, acthd, sizeof(acthd)); > > - dev_priv->last_instdone = instdone; > > - dev_priv->last_instdone1 = instdone1; > > + dev_priv->last_instdone = instdone[0]; > > + dev_priv->last_instdone1 = instdone[1]; > > } > > > > repeat: > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index f27e998..1f97b3f 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -478,6 +478,7 @@ > > #define IPEIR_I965 0x02064 > > #define IPEHR_I965 0x02068 > > #define INSTDONE_I965 0x0206c > > +#define I915_NUM_INSTDONE_REG 2 > > #define RING_IPEIR(base) ((base)+0x64) > > #define RING_IPEHR(base) ((base)+0x68) > > #define RING_INSTDONE(base) ((base)+0x6c) > > -- > > 1.7.12 > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel at ffwll.ch Mobile: +41 (0)79 365 57 48