Just a bit of cleanup; it appears to have no effect. Signed-off-by: Keith Packard <keithp at keithp.com> --- drivers/gpu/drm/i915/intel_display.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7106807..95248bd 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2391,6 +2391,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc) temp |= FDI_LINK_TRAIN_PATTERN_1; I915_WRITE(reg, temp | FDI_TX_ENABLE); + I915_WRITE(FDI_RX_IIR(pipe), FDI_RX_BIT_LOCK); reg = FDI_RX_CTL(pipe); temp = I915_READ(reg); temp &= ~FDI_LINK_TRAIN_NONE; @@ -2398,10 +2399,10 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc) I915_WRITE(reg, temp | FDI_RX_ENABLE); POSTING_READ(reg); - udelay(150); /* Ironlake workaround, enable clock pointer after FDI enable*/ if (HAS_PCH_IBX(dev)) { + udelay(150); I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR); I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR | FDI_RX_PHASE_SYNC_POINTER_EN); @@ -2409,6 +2410,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc) reg = FDI_RX_IIR(pipe); for (tries = 0; tries < 5; tries++) { + udelay(150); temp = I915_READ(reg); DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp); @@ -2422,6 +2424,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc) DRM_ERROR("FDI train 1 fail!\n"); /* Train 2 */ + I915_WRITE(FDI_RX_IIR(pipe), FDI_RX_SYMBOL_LOCK); reg = FDI_TX_CTL(pipe); temp = I915_READ(reg); temp &= ~FDI_LINK_TRAIN_NONE; @@ -2435,10 +2438,10 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc) I915_WRITE(reg, temp); POSTING_READ(reg); - udelay(150); reg = FDI_RX_IIR(pipe); for (tries = 0; tries < 5; tries++) { + udelay(150); temp = I915_READ(reg); DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp); -- 1.7.10.4