With the pipe A quirk properly fixed up for i830M, this shouldn't be
required any longer.
Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
drivers/gpu/drm/i915/dvo_ns2501.c | 7 -------
drivers/gpu/drm/i915/intel_display.c | 2 +-
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c
index 1a0bad9..6bd383d 100644
--- a/drivers/gpu/drm/i915/dvo_ns2501.c
+++ b/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -75,11 +75,6 @@ struct ns2501_priv {
#define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr))
/*
- * Include the PLL launcher prototype
- */
-extern void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
-
-/*
* For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens
* laptops does not react on the i2c bus unless
* both the PLL is running and the display is configured in its native
@@ -113,8 +108,6 @@ static void enable_dvo(struct intel_dvo_device *dvo)
I915_WRITE(DVOC_SRCDIM, 0x400300); // 1024x768
I915_WRITE(FW_BLC, 0x1080304);
- intel_enable_pll(dev_priv, 0);
-
I915_WRITE(DVOC, 0x90004084);
}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c10d50b..13e444c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1431,7 +1431,7 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
*
* Unfortunately needed by dvo_ns2501 since the dvo depends on it running.
*/
-void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
+static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
{
int reg;
u32 val;
--
1.7.11.2
