On Fri, 10 Aug 2012, Chris Wilson <chris at chris-wilson.co.uk> wrote: > On Fri, 10 Aug 2012 12:57:59 +0300, Jani Nikula <jani.nikula at linux.intel.com> wrote: >> On Fri, 10 Aug 2012, Chris Wilson <chris at chris-wilson.co.uk> wrote: >> > When invalidating the TLBs it is documentated as requiring a post-sync >> > write. Failure to do so seems to result in a GPU hang. >> > >> > Exposure to this hang on IVB seems to be a result of removing the extra >> > stalls required for SNB pipecontrol workarounds: >> >> Hi Chris, AFAICT TLB invalidate requires PIPE_CONTROL_CS_STALL set per >> the spec. I can't find a mention of the post-sync write, though. Could >> you double check, please? > > Considering replacing it with a CS_STALL just hard hung my box, I remain > unconvinced. :-p I meant you could check the spec, not actually try it! ;) But I accept that's a good reason not to use it. BR, Jani.
