From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
Keep a per-engine number of runnable (waiting for GPU time) requests.
v2:
* Move queued increment from insert_request to execlist_submit_request to
avoid bumping when re-ordering for priority.
* Support the counter on the ringbuffer submission path as well, albeit
just notionally. (Chris Wilson)
v3:
* Rebase.
v4:
* Rename and move the stats into a container structure. (Chris Wilson)
v5:
* Re-order fields in struct intel_engine_cs. (Chris Wilson)
v6-v8:
* Rebases.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_request.c | 7 +++++++
drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++--
drivers/gpu/drm/i915/intel_lrc.c | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.h | 9 +++++++++
4 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 43c7134a9b93..2052028c1d68 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -525,6 +525,9 @@ void __i915_request_submit(struct i915_request *request)
engine->emit_breadcrumb(request,
request->ring->vaddr + request->postfix);
+ GEM_BUG_ON(engine->request_stats.runnable == 0);
+ engine->request_stats.runnable--;
+
spin_lock(&request->timeline->lock);
list_move_tail(&request->link, &timeline->requests);
spin_unlock(&request->timeline->lock);
@@ -542,6 +545,8 @@ void i915_request_submit(struct i915_request *request)
/* Will be called from irq-context when using foreign fences. */
spin_lock_irqsave(&engine->timeline->lock, flags);
+ engine->request_stats.runnable++;
+
__i915_request_submit(request);
spin_unlock_irqrestore(&engine->timeline->lock, flags);
@@ -581,6 +586,8 @@ void __i915_request_unsubmit(struct i915_request *request)
timeline = request->timeline;
GEM_BUG_ON(timeline == engine->timeline);
+ engine->request_stats.runnable++;
+
spin_lock(&timeline->lock);
list_move(&request->link, &timeline->requests);
spin_unlock(&timeline->lock);
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 337dfa56a738..3726544cfb00 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1917,12 +1917,13 @@ void intel_engine_dump(struct intel_engine_cs *engine,
if (i915_terminally_wedged(&engine->i915->gpu_error))
drm_printf(m, "*** WEDGED ***\n");
- drm_printf(m, "\tcurrent seqno %x, last %x, hangcheck %x [%d ms], inflight %d\n",
+ drm_printf(m, "\tcurrent seqno %x, last %x, hangcheck %x [%d ms], inflight %d, runnable %u\n",
intel_engine_get_seqno(engine),
intel_engine_last_submit(engine),
engine->hangcheck.seqno,
jiffies_to_msecs(jiffies - engine->hangcheck.action_timestamp),
- engine->timeline->inflight_seqnos);
+ engine->timeline->inflight_seqnos,
+ engine->request_stats.runnable);
drm_printf(m, "\tReset count: %d (global %d)\n",
i915_reset_engine_count(error, engine),
i915_reset_count(error));
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 53f1c009ed7b..46bacd98a360 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1033,6 +1033,7 @@ static void execlists_submit_request(struct i915_request *request)
queue_request(engine, &request->priotree, rq_prio(request));
submit_queue(engine, rq_prio(request));
+ engine->request_stats.runnable++;
GEM_BUG_ON(!engine->execlists.first);
GEM_BUG_ON(list_empty(&request->priotree.link));
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 828a1f924405..e98e007cb96b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -338,6 +338,15 @@ struct intel_engine_cs {
struct drm_i915_gem_object *default_state;
+ struct {
+ /**
+ * @runnable: Number of runnable requests sent to the backend.
+ *
+ * Count of requests waiting for the GPU to execute them.
+ */
+ unsigned int runnable;
+ } request_stats;
+
atomic_t irq_count;
unsigned long irq_posted;
#define ENGINE_IRQ_BREADCRUMB 0
--
2.14.1
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