It's busted. Compared to ilk, snb and ivb where I've run the i-g-t
hangman test in a loop for a few hours, my gm45 never managed to reset
the gpu. And Chris Wilson confirmed on irc that he's never seen a case
where the gen4 gpu reset code actually helped.
Given that it's not unlikely that this is causing harm, kill it.
Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
drivers/gpu/drm/i915/i915_drv.c | 37 -------------------------------------
1 files changed, 0 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7a09c28..0578c79 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -703,40 +703,6 @@ static int i8xx_do_reset(struct drm_device *dev)
return 0;
}
-static int i965_reset_complete(struct drm_device *dev)
-{
- u8 gdrst;
- pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
- return gdrst & 0x1;
-}
-
-static int i965_do_reset(struct drm_device *dev)
-{
- int ret;
- u8 gdrst;
-
- /*
- * Set the domains we want to reset (GRDOM/bits 2 and 3) as
- * well as the reset bit (GR/bit 0). Setting the GR bit
- * triggers the reset; when done, the hardware will clear it.
- */
- pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
- pci_write_config_byte(dev->pdev, I965_GDRST,
- gdrst | GRDOM_RENDER |
- GRDOM_RESET_ENABLE);
- ret = wait_for(i965_reset_complete(dev), 500);
- if (ret)
- return ret;
-
- /* We can't reset render&media without also resetting display ... */
- pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
- pci_write_config_byte(dev->pdev, I965_GDRST,
- gdrst | GRDOM_MEDIA |
- GRDOM_RESET_ENABLE);
-
- return wait_for(i965_reset_complete(dev), 500);
-}
-
static int ironlake_do_reset(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -805,9 +771,6 @@ static int intel_gpu_reset(struct drm_device *dev)
case 5:
ret = ironlake_do_reset(dev);
break;
- case 4:
- ret = i965_do_reset(dev);
- break;
case 2:
ret = i8xx_do_reset(dev);
break;
--
1.7.9
