On Thu, 26 Apr 2012 15:20:59 -0300 Eugeni Dodonov <eugeni.dodonov at intel.com> wrote: > Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c index 0552058..06f38ec 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -1694,8 +1694,8 @@ static void sandybridge_update_wm(struct > drm_device *dev) enabled |= 2; > } > > - /* IVB has 3 pipes */ > - if (IS_IVYBRIDGE(dev) && > + /* Only IVB and Haswell has 3 pipes support so far */ > + if ((IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) && > g4x_compute_wm0(dev, 2, > &sandybridge_display_wm_info, latency, > &sandybridge_cursor_wm_info, latency, This could probably just check num_pipes instead. Jesse
