Hi Gaurav, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on next-20180223] [also build test WARNING on v4.16-rc3] [cannot apply to drm-intel/for-linux-next drm/drm-next v4.16-rc3 v4.16-rc2 v4.16-rc1] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Gaurav-K-Singh/Enabling-VDSC-in-i915-driver-for-GLK/20180226-114246 smatch warnings: drivers/gpu/drm/i915/intel_dp.c:6379 intel_edp_init_connector() error: we previously assumed 'fixed_mode' could be null (see line 6367) # https://github.com/0day-ci/linux/commit/0be77ee7aeeb70345533485fec0f376c0180bafa git remote add linux-review https://github.com/0day-ci/linux git remote update linux-review git checkout 0be77ee7aeeb70345533485fec0f376c0180bafa vim +/fixed_mode +6379 drivers/gpu/drm/i915/intel_dp.c 0be77ee7ae Gaurav K Singh 2018-02-23 6285 ed92f0b239 Paulo Zanoni 2013-06-12 6286 static bool intel_edp_init_connector(struct intel_dp *intel_dp, 36b5f425dd Ville Syrjälä 2014-10-16 6287 struct intel_connector *intel_connector) ed92f0b239 Paulo Zanoni 2013-06-12 6288 { 2f7734770c Ville Syrjälä 2017-11-09 6289 struct drm_device *dev = intel_dp_to_dev(intel_dp); fac5e23e3c Chris Wilson 2016-07-04 6290 struct drm_i915_private *dev_priv = to_i915(dev); 2f7734770c Ville Syrjälä 2017-11-09 6291 struct drm_connector *connector = &intel_connector->base; ed92f0b239 Paulo Zanoni 2013-06-12 6292 struct drm_display_mode *fixed_mode = NULL; dc911f5bd8 Jim Bride 2017-08-09 6293 struct drm_display_mode *alt_fixed_mode = NULL; 4f9db5b51c Pradeep Bhat 2014-04-05 6294 struct drm_display_mode *downclock_mode = NULL; 0be77ee7ae Gaurav K Singh 2018-02-23 6295 struct dp_sink_dsc_caps sink_dp_dsc_caps = {0}; ed92f0b239 Paulo Zanoni 2013-06-12 6296 bool has_dpcd; ed92f0b239 Paulo Zanoni 2013-06-12 6297 struct drm_display_mode *scan; ed92f0b239 Paulo Zanoni 2013-06-12 6298 struct edid *edid; 6517d2734d Ville Syrjälä 2014-11-07 6299 enum pipe pipe = INVALID_PIPE; ed92f0b239 Paulo Zanoni 2013-06-12 6300 1853a9daa1 Jani Nikula 2017-08-18 6301 if (!intel_dp_is_edp(intel_dp)) ed92f0b239 Paulo Zanoni 2013-06-12 6302 return true; ed92f0b239 Paulo Zanoni 2013-06-12 6303 97a824e156 Imre Deak 2016-06-21 6304 /* 97a824e156 Imre Deak 2016-06-21 6305 * On IBX/CPT we may get here with LVDS already registered. Since the 97a824e156 Imre Deak 2016-06-21 6306 * driver uses the only internal power sequencer available for both 97a824e156 Imre Deak 2016-06-21 6307 * eDP and LVDS bail out early in this case to prevent interfering 97a824e156 Imre Deak 2016-06-21 6308 * with an already powered-on LVDS power sequencer. 97a824e156 Imre Deak 2016-06-21 6309 */ 2f7734770c Ville Syrjälä 2017-11-09 6310 if (intel_get_lvds_encoder(&dev_priv->drm)) { 97a824e156 Imre Deak 2016-06-21 6311 WARN_ON(!(HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv))); 97a824e156 Imre Deak 2016-06-21 6312 DRM_INFO("LVDS was detected, not registering eDP\n"); 97a824e156 Imre Deak 2016-06-21 6313 97a824e156 Imre Deak 2016-06-21 6314 return false; 97a824e156 Imre Deak 2016-06-21 6315 } 97a824e156 Imre Deak 2016-06-21 6316 49e6bc51bc Ville Syrjälä 2014-10-28 6317 pps_lock(intel_dp); b4d06ede4e Imre Deak 2016-06-21 6318 b4d06ede4e Imre Deak 2016-06-21 6319 intel_dp_init_panel_power_timestamps(intel_dp); 46bd8383d8 Ville Syrjälä 2017-10-31 6320 intel_dp_pps_init(intel_dp); b4d06ede4e Imre Deak 2016-06-21 6321 intel_edp_panel_vdd_sanitize(intel_dp); b4d06ede4e Imre Deak 2016-06-21 6322 49e6bc51bc Ville Syrjälä 2014-10-28 6323 pps_unlock(intel_dp); 636352173a Paulo Zanoni 2014-04-22 6324 ed92f0b239 Paulo Zanoni 2013-06-12 6325 /* Cache DPCD and EDID for edp. */ fe5a66f91c Ville Syrjälä 2016-07-29 6326 has_dpcd = intel_edp_init_dpcd(intel_dp); ed92f0b239 Paulo Zanoni 2013-06-12 6327 fe5a66f91c Ville Syrjälä 2016-07-29 6328 if (!has_dpcd) { ed92f0b239 Paulo Zanoni 2013-06-12 6329 /* if this fails, presume the device is a ghost */ ed92f0b239 Paulo Zanoni 2013-06-12 6330 DRM_INFO("failed to retrieve link info, disabling eDP\n"); b4d06ede4e Imre Deak 2016-06-21 6331 goto out_vdd_off; ed92f0b239 Paulo Zanoni 2013-06-12 6332 } ed92f0b239 Paulo Zanoni 2013-06-12 6333 0be77ee7ae Gaurav K Singh 2018-02-23 6334 /* Get DSC capability of DP sink */ 0be77ee7ae Gaurav K Singh 2018-02-23 6335 if (INTEL_GEN(dev_priv) >= 9) { 0be77ee7ae Gaurav K Singh 2018-02-23 6336 intel_dp_sink_get_dsc_capability(intel_dp, &sink_dp_dsc_caps); 0be77ee7ae Gaurav K Singh 2018-02-23 6337 intel_dp_get_compression_data(intel_dp, sink_dp_dsc_caps); 0be77ee7ae Gaurav K Singh 2018-02-23 6338 } 0be77ee7ae Gaurav K Singh 2018-02-23 6339 060c877848 Daniel Vetter 2014-03-21 6340 mutex_lock(&dev->mode_config.mutex); 0b99836f23 Jani Nikula 2014-03-14 6341 edid = drm_get_edid(connector, &intel_dp->aux.ddc); ed92f0b239 Paulo Zanoni 2013-06-12 6342 if (edid) { ed92f0b239 Paulo Zanoni 2013-06-12 6343 if (drm_add_edid_modes(connector, edid)) { ed92f0b239 Paulo Zanoni 2013-06-12 6344 drm_mode_connector_update_edid_property(connector, ed92f0b239 Paulo Zanoni 2013-06-12 6345 edid); ed92f0b239 Paulo Zanoni 2013-06-12 6346 } else { ed92f0b239 Paulo Zanoni 2013-06-12 6347 kfree(edid); ed92f0b239 Paulo Zanoni 2013-06-12 6348 edid = ERR_PTR(-EINVAL); ed92f0b239 Paulo Zanoni 2013-06-12 6349 } ed92f0b239 Paulo Zanoni 2013-06-12 6350 } else { ed92f0b239 Paulo Zanoni 2013-06-12 6351 edid = ERR_PTR(-ENOENT); ed92f0b239 Paulo Zanoni 2013-06-12 6352 } ed92f0b239 Paulo Zanoni 2013-06-12 6353 intel_connector->edid = edid; ed92f0b239 Paulo Zanoni 2013-06-12 6354 dc911f5bd8 Jim Bride 2017-08-09 6355 /* prefer fixed mode from EDID if available, save an alt mode also */ ed92f0b239 Paulo Zanoni 2013-06-12 6356 list_for_each_entry(scan, &connector->probed_modes, head) { ed92f0b239 Paulo Zanoni 2013-06-12 6357 if ((scan->type & DRM_MODE_TYPE_PREFERRED)) { ed92f0b239 Paulo Zanoni 2013-06-12 6358 fixed_mode = drm_mode_duplicate(dev, scan); 4f9db5b51c Pradeep Bhat 2014-04-05 6359 downclock_mode = intel_dp_drrs_init( 4f9db5b51c Pradeep Bhat 2014-04-05 6360 intel_connector, fixed_mode); dc911f5bd8 Jim Bride 2017-08-09 6361 } else if (!alt_fixed_mode) { dc911f5bd8 Jim Bride 2017-08-09 6362 alt_fixed_mode = drm_mode_duplicate(dev, scan); ed92f0b239 Paulo Zanoni 2013-06-12 6363 } ed92f0b239 Paulo Zanoni 2013-06-12 6364 } ed92f0b239 Paulo Zanoni 2013-06-12 6365 ed92f0b239 Paulo Zanoni 2013-06-12 6366 /* fallback to VBT if available for eDP */ ed92f0b239 Paulo Zanoni 2013-06-12 @6367 if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) { ed92f0b239 Paulo Zanoni 2013-06-12 6368 fixed_mode = drm_mode_duplicate(dev, ed92f0b239 Paulo Zanoni 2013-06-12 6369 dev_priv->vbt.lfp_lvds_vbt_mode); df457245b5 Ville Syrjälä 2016-05-31 6370 if (fixed_mode) { ^^^^^^^^^^ Check for NULL. ed92f0b239 Paulo Zanoni 2013-06-12 6371 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; df457245b5 Ville Syrjälä 2016-05-31 6372 connector->display_info.width_mm = fixed_mode->width_mm; df457245b5 Ville Syrjälä 2016-05-31 6373 connector->display_info.height_mm = fixed_mode->height_mm; df457245b5 Ville Syrjälä 2016-05-31 6374 } ed92f0b239 Paulo Zanoni 2013-06-12 6375 } 060c877848 Daniel Vetter 2014-03-21 6376 mutex_unlock(&dev->mode_config.mutex); ed92f0b239 Paulo Zanoni 2013-06-12 6377 0be77ee7ae Gaurav K Singh 2018-02-23 6378 if (intel_dp->compr_params.compression_support) { 0be77ee7ae Gaurav K Singh 2018-02-23 @6379 intel_dp->compr_params.dsc_cfg.pic_width = fixed_mode->hdisplay; ^^^^^^^^^^^^^^^^^^^^^ Not checked. 0be77ee7ae Gaurav K Singh 2018-02-23 6380 intel_dp->compr_params.dsc_cfg.pic_height = 0be77ee7ae Gaurav K Singh 2018-02-23 6381 fixed_mode->vdisplay; 0be77ee7ae Gaurav K Singh 2018-02-23 6382 intel_dp->compr_params.dsc_cfg.slice_width = DIV_ROUND_UP( 0be77ee7ae Gaurav K Singh 2018-02-23 6383 intel_dp->compr_params.dsc_cfg.pic_width, 0be77ee7ae Gaurav K Singh 2018-02-23 6384 intel_dp->compr_params.dsc_cfg.slice_count); 0be77ee7ae Gaurav K Singh 2018-02-23 6385 0be77ee7ae Gaurav K Singh 2018-02-23 6386 /* slice height data is not available from dpcd */ 0be77ee7ae Gaurav K Singh 2018-02-23 6387 if (intel_dp->compr_params.dsc_cfg.pic_height % 8 == 0) 0be77ee7ae Gaurav K Singh 2018-02-23 6388 intel_dp->compr_params.dsc_cfg.slice_height = 8; 0be77ee7ae Gaurav K Singh 2018-02-23 6389 if (intel_dp->compr_params.dsc_cfg.pic_height % 4 == 0) 0be77ee7ae Gaurav K Singh 2018-02-23 6390 intel_dp->compr_params.dsc_cfg.slice_height = 4; 0be77ee7ae Gaurav K Singh 2018-02-23 6391 if (intel_dp->compr_params.dsc_cfg.pic_height % 2 == 0) 0be77ee7ae Gaurav K Singh 2018-02-23 6392 intel_dp->compr_params.dsc_cfg.slice_height = 2; 0be77ee7ae Gaurav K Singh 2018-02-23 6393 } 0be77ee7ae Gaurav K Singh 2018-02-23 6394 920a14b245 Tvrtko Ursulin 2016-10-14 6395 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 01527b3127 Clint Taylor 2014-07-07 6396 intel_dp->edp_notifier.notifier_call = edp_notify_handler; 01527b3127 Clint Taylor 2014-07-07 6397 register_reboot_notifier(&intel_dp->edp_notifier); 6517d2734d Ville Syrjälä 2014-11-07 6398 6517d2734d Ville Syrjälä 2014-11-07 6399 /* 6517d2734d Ville Syrjälä 2014-11-07 6400 * Figure out the current pipe for the initial backlight setup. 6517d2734d Ville Syrjälä 2014-11-07 6401 * If the current pipe isn't valid, try the PPS pipe, and if that 6517d2734d Ville Syrjälä 2014-11-07 6402 * fails just assume pipe A. 6517d2734d Ville Syrjälä 2014-11-07 6403 */ 9f2bdb006a Ville Syrjälä 2016-12-14 6404 pipe = vlv_active_pipe(intel_dp); 6517d2734d Ville Syrjälä 2014-11-07 6405 6517d2734d Ville Syrjälä 2014-11-07 6406 if (pipe != PIPE_A && pipe != PIPE_B) 6517d2734d Ville Syrjälä 2014-11-07 6407 pipe = intel_dp->pps_pipe; 6517d2734d Ville Syrjälä 2014-11-07 6408 6517d2734d Ville Syrjälä 2014-11-07 6409 if (pipe != PIPE_A && pipe != PIPE_B) 6517d2734d Ville Syrjälä 2014-11-07 6410 pipe = PIPE_A; 6517d2734d Ville Syrjälä 2014-11-07 6411 6517d2734d Ville Syrjälä 2014-11-07 6412 DRM_DEBUG_KMS("using pipe %c for initial backlight setup\n", 6517d2734d Ville Syrjälä 2014-11-07 6413 pipe_name(pipe)); 01527b3127 Clint Taylor 2014-07-07 6414 } 01527b3127 Clint Taylor 2014-07-07 6415 dc911f5bd8 Jim Bride 2017-08-09 6416 intel_panel_init(&intel_connector->panel, fixed_mode, alt_fixed_mode, dc911f5bd8 Jim Bride 2017-08-09 6417 downclock_mode); 5507faeb03 Jani Nikula 2015-09-14 6418 intel_connector->panel.backlight.power = intel_edp_backlight_power; 6517d2734d Ville Syrjälä 2014-11-07 6419 intel_panel_setup_backlight(connector, pipe); ed92f0b239 Paulo Zanoni 2013-06-12 6420 ed92f0b239 Paulo Zanoni 2013-06-12 6421 return true; b4d06ede4e Imre Deak 2016-06-21 6422 b4d06ede4e Imre Deak 2016-06-21 6423 out_vdd_off: b4d06ede4e Imre Deak 2016-06-21 6424 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); b4d06ede4e Imre Deak 2016-06-21 6425 /* b4d06ede4e Imre Deak 2016-06-21 6426 * vdd might still be enabled do to the delayed vdd off. b4d06ede4e Imre Deak 2016-06-21 6427 * Make sure vdd is actually turned off here. b4d06ede4e Imre Deak 2016-06-21 6428 */ b4d06ede4e Imre Deak 2016-06-21 6429 pps_lock(intel_dp); b4d06ede4e Imre Deak 2016-06-21 6430 edp_panel_vdd_off_sync(intel_dp); b4d06ede4e Imre Deak 2016-06-21 6431 pps_unlock(intel_dp); b4d06ede4e Imre Deak 2016-06-21 6432 b4d06ede4e Imre Deak 2016-06-21 6433 return false; ed92f0b239 Paulo Zanoni 2013-06-12 6434 } ed92f0b239 Paulo Zanoni 2013-06-12 6435 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
