On Tue, 24 Apr 2012 16:36:50 +0100 Chris Wilson <chris at chris-wilson.co.uk> wrote: > Enabling the plane before we have assigned valid address means that it > will access random PTE (often with conflicting memory types) and cause > GPU lockups. However, enabling the plane too early appears to workaround > a number of bugs in our modesetting code. > > Cc: Franz Melchior <melchior.franz at gmail.com> > References: https://bugs.freedesktop.org/show_bug.cgi?id=39947 > References: https://bugs.freedesktop.org/show_bug.cgi?id=41091 > References: https://bugs.freedesktop.org/show_bug.cgi?id=49041 > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/intel_display.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 45e668c..c2d7a82 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -4025,7 +4025,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, > > I915_WRITE(DSPCNTR(plane), dspcntr); > POSTING_READ(DSPCNTR(plane)); > - intel_enable_plane(dev_priv, plane, pipe); > > ret = intel_pipe_set_base(crtc, x, y, old_fb); > Acked-by: Jesse Barnes <jbarnes at virtuousgeek.org> If this introduces regressions in mode setting, I think it means we still have a serious bug hiding in the 9xx stuff somewhere that we ought to root cause instead of papering over again. -- Jesse Barnes, Intel Open Source Technology Center
