On Sat, Apr 21, 2012 at 05:57:08PM -0700, Ben Widawsky wrote: > Rebased after new intel_pm split. This needs testing from QA to see how > it impacts power consumption. > > Cc: "Zhang, Ouping" <ouping.zhang at intel.com> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net> I've seen the internal power testing results and nothing seems to change. And you've mentioned in an earlier version of this that this regresses openarena throughput. So I guess I can drop this? -Daniel > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_pm.c | 4 ++++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 5ac9837..024e390 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4030,6 +4030,9 @@ > #define GEN6_RC6 3 > #define GEN6_RC7 4 > > +#define GEN7_MISCCPCTL 0x9424 > +#define GEN7_DOP_CLOCK_GATE_ENABLE (1<<0) > + > #define G4X_AUD_VID_DID 0x62020 > #define INTEL_AUDIO_DEVCL 0x808629FB > #define INTEL_AUDIO_DEVBLC 0x80862801 > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 36940a3..188206a 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2776,6 +2776,10 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) > } > > gen7_setup_fixed_func_scheduler(dev_priv); > + > + if (i915_powersave) > + I915_WRITE(GEN7_MISCCPCTL, > + I915_READ(GEN7_MISCCPCTL) | GEN7_DOP_CLOCK_GATE_ENABLE); > } > > static void valleyview_init_clock_gating(struct drm_device *dev) > -- > 1.7.10 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel at ffwll.ch Mobile: +41 (0)79 365 57 48
