On Tue, Apr 24, 2012 at 10:24, Chris Wilson <chris at chris-wilson.co.uk>wrote: > On Tue, 24 Apr 2012 14:04:12 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> > wrote: > > ... and put them to so good use. > > > > Note that there's functional change in vlv clock gating code, we now > > no longer spuriously read back the current value of the bit. According > > to Bspec the high bits should always read zeror, so ORing this in > s/zeror/zero/ > > should have no effect. > > > > Cc: Jesse Barnes <jbarnes at virtuousgeek.org> > > Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch> > > The transforms here look fine, just a moment of concern for not > repeating the MODE twiddling in init_render_ring after reset. > > Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> > Reviewed-by: Eugeni Dodonov <eugeni.dodonov at intel.com> -- Eugeni Dodonov <http://eugeni.dodonov.net/> -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20120424/f766b4c3/attachment-0001.htm>
