On Fri, 13 Apr 2012 17:08:57 -0300, Eugeni Dodonov <eugeni.dodonov at intel.com> wrote:
> + /* Those registers seem to be double-buffered, so write them twice */
> + for (j=0; j < 2; j++) {
> + for (i=0, reg=DDI_BUF_TRANS(port); i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
> + I915_WRITE(reg,
> + (use_fdi_mode) ?
> + hsw_ddi_translations_fdi[i] :
> + hsw_ddi_translations_dp[i]);
If you use a temporary variable for the translation table ptr (and moved
it out of the loop), these writes would fit into 80 columns and be much
more readable.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
