-------- Original message -------- Subject: Re: [PATCH 1/2] drm/i915: Remove the MI_FLUSH_ENABLE setting. From: Eric Anholt <eric at anholt.net> To: Ben Widawsky <ben at bwidawsk.net> CC: Keith Packard <keithp at keithp.com>,intel-gfx at lists.freedesktop.org On Fri, 20 Jan 2012 14:57:44 -0800, Ben Widawsky <ben at bwidawsk.net> wrote: > On 01/20/2012 11:16 AM, Eric Anholt wrote: > > On Thu, 19 Jan 2012 10:59:57 -0800, Ben Widawsky <ben at bwidawsk.net> wrote: > >> On 01/19/2012 10:54 AM, Keith Packard wrote: > >>> On Thu, 19 Jan 2012 10:50:05 -0800, Eric Anholt <eric at anholt.net> wrote: > >>> > >>>> - if (IS_GEN6(dev) || IS_GEN7(dev)) > >>>> - mode |= MI_FLUSH_ENABLE << 16 | MI_FLUSH_ENABLE; > >>> > >>> This seems better than setting random bits that don't do anything but > >>> annoy the simulator. > >> > >> The simulator complains unless both bits are set iirc. I can double > >> check, but it's been a while since I've run without my patch. > > > > Can you please cite the message you're getting?? I've read a lot of the > > simulator at this point, particularly pieces relating to flushing, and I > > can't find what you're talking about. > > > > It is not email friendly paste. > > Gen7GT/Render/src/CsMiCommonCatcher.cpp +293 > > It links to a power point which shows the workaround is to set both > bits. The powerpoint is kind enough to crash libreoffice for me. That block is checking exactly one bit, bit 12, in my tree. Please read the powerpoint? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20120120/98f356c6/attachment.htm>
