On Tue, Dec 13, 2011 at 07:05:41PM -0200, Eugeni Dodonov wrote:
> From: Eugeni Dodonov <eugeni.dodonov at intel.com>
>
> LLC is not SNB-specific, so we should check for it in a more generic way.
>
> v2: export LLC support status via debugfs and DRM GETPARAM.
>
> v3: rebase on newer kernel version which says that IVB supports LLC as
> well.
>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
The patch now conflicts with gen7 sol reset stuff. Care to rebase? Also
can you create a quick libdrm helper to check for llc support that returns
true for gen6&gen7 in the absence of this ioctl?
-Daniel
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 1 +
> drivers/gpu/drm/i915/i915_dma.c | 3 +++
> drivers/gpu/drm/i915/i915_drv.c | 4 ++++
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> drivers/gpu/drm/i915/i915_gem.c | 4 ++--
> include/drm/i915_drm.h | 1 +
> 6 files changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index d09a6e0..cb8a153 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -82,6 +82,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
> B(supports_tv);
> B(has_bsd_ring);
> B(has_blt_ring);
> + B(has_llc);
> #undef B
>
> return 0;
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index a9533c5..938ad57 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -781,6 +781,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
> case I915_PARAM_HAS_RELAXED_DELTA:
> value = 1;
> break;
> + case I915_PARAM_HAS_LLC:
> + value = HAS_LLC(dev);
> + break;
> default:
> DRM_DEBUG_DRIVER("Unknown parameter %d\n",
> param->param);
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 15bfa91..19fb7a4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -214,6 +214,7 @@ static const struct intel_device_info intel_sandybridge_d_info = {
> .need_gfx_hws = 1, .has_hotplug = 1,
> .has_bsd_ring = 1,
> .has_blt_ring = 1,
> + .has_llc = 1,
> };
>
> static const struct intel_device_info intel_sandybridge_m_info = {
> @@ -222,6 +223,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
> .has_fbc = 1,
> .has_bsd_ring = 1,
> .has_blt_ring = 1,
> + .has_llc = 1,
> };
>
> static const struct intel_device_info intel_ivybridge_d_info = {
> @@ -229,6 +231,7 @@ static const struct intel_device_info intel_ivybridge_d_info = {
> .need_gfx_hws = 1, .has_hotplug = 1,
> .has_bsd_ring = 1,
> .has_blt_ring = 1,
> + .has_llc = 1,
> };
>
> static const struct intel_device_info intel_ivybridge_m_info = {
> @@ -237,6 +240,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
> .has_fbc = 0, /* FBC is not enabled on Ivybridge mobile yet */
> .has_bsd_ring = 1,
> .has_blt_ring = 1,
> + .has_llc = 1,
> };
>
> static const struct pci_device_id pciidlist[] = { /* aka */
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4a9c1b9..abbbf32 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -250,6 +250,7 @@ struct intel_device_info {
> u8 supports_tv:1;
> u8 has_bsd_ring:1;
> u8 has_blt_ring:1;
> + u8 has_llc:1;
> };
>
> enum no_fbc_reason {
> @@ -961,6 +962,7 @@ struct drm_i915_file_private {
>
> #define HAS_BSD(dev) (INTEL_INFO(dev)->has_bsd_ring)
> #define HAS_BLT(dev) (INTEL_INFO(dev)->has_blt_ring)
> +#define HAS_LLC(dev) (INTEL_INFO(dev)->has_llc)
> #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
>
> #define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 60ff1b6..fb69337 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3620,8 +3620,8 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
> obj->base.write_domain = I915_GEM_DOMAIN_CPU;
> obj->base.read_domains = I915_GEM_DOMAIN_CPU;
>
> - if (IS_GEN6(dev) || IS_GEN7(dev)) {
> - /* On Gen6, we can have the GPU use the LLC (the CPU
> + if (HAS_LLC(dev)) {
> + /* On some devices, we can have the GPU use the LLC (the CPU
> * cache) for about a 10% performance improvement
> * compared to uncached. Graphics requests other than
> * display scanout are coherent with the CPU in
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
> index 28c0d11..b34e630 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -291,6 +291,7 @@ typedef struct drm_i915_irq_wait {
> #define I915_PARAM_HAS_COHERENT_RINGS 13
> #define I915_PARAM_HAS_EXEC_CONSTANTS 14
> #define I915_PARAM_HAS_RELAXED_DELTA 15
> +#define I915_PARAM_HAS_LLC 16
>
> typedef struct drm_i915_getparam {
> int param;
> --
> 1.7.7.4
>
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--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
