When we suspend, we do not want to be interrupted by a pending reset, or failure of that reset. After the resume, the errors should be noted as usual. Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- tests/gem_eio.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/tests/gem_eio.c b/tests/gem_eio.c index 608b2dfd..899cb627 100644 --- a/tests/gem_eio.c +++ b/tests/gem_eio.c @@ -207,6 +207,51 @@ static void test_inflight(int fd) } } +static void test_inflight_suspend(int fd) +{ + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 obj[2]; + uint32_t bbe = MI_BATCH_BUFFER_END; + int fence[64]; /* conservative estimate of ring size */ + igt_hang_t hang; + + igt_require(gem_has_exec_fence(fd)); + igt_require(i915_reset_control(false)); + + memset(obj, 0, sizeof(obj)); + obj[0].flags = EXEC_OBJECT_WRITE; + obj[1].handle = gem_create(fd, 4096); + gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); + + hang = igt_hang_ring(fd, 0); + obj[0].handle = hang.handle; + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = to_user_pointer(obj); + execbuf.buffer_count = 2; + execbuf.flags = I915_EXEC_FENCE_OUT; + + for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) { + gem_execbuf_wr(fd, &execbuf); + fence[n] = execbuf.rsvd2 >> 32; + igt_assert(fence[n] != -1); + } + + igt_system_suspend_autoresume(SUSPEND_STATE_MEM, + SUSPEND_TEST_DEVICES); + + igt_post_hang_ring(fd, hang); + + igt_assert_eq(__gem_wait(fd, obj[1].handle, -1), 0); + for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) { + igt_assert_eq(sync_fence_status(fence[n]), -EIO); + close(fence[n]); + } + + igt_assert(i915_reset_control(true)); + trigger_reset(fd); +} + static uint32_t __gem_context_create(int fd) { struct drm_i915_gem_context_create create; @@ -454,4 +499,7 @@ igt_main igt_skip_on(caps & HAVE_SEMAPHORES); test_inflight_internal(fd); } + + igt_subtest("in-flight-suspend") + test_inflight_suspend(fd); } -- 2.14.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx