Re: [PATCH] drm/i915: Avoid using dev_priv->info.gen directly.

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On Tue, Sep 26, 2017 at 02:13:46PM -0700, Rodrigo Vivi wrote:
> Let's stop this usage before it spreads so much.
> 
> 1. This check is not part of usual searches happening when adding
> new platform.
> 2. There is already a duplication here with INTEL_INFO(dev_priv)->gen
> and INTEL_GEN(dev_priv).
> 
> So let's please avoid yet another way.
> 
> Fixes: b22ca995ba1c ("drm/i915: prepare pipe for YCBCR420 output")
> Fixes: 27082493e9c6 ("drm/i915/skl: Update DDB values atomically with wms/plane attrs")
> Cc: Lyude <cpaul@xxxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Daniel Vetter <daniel.vetter@xxxxxxxxx>
> Cc: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx>
> Cc: Hans de Goede <hdegoede@xxxxxxxxxx>
> Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Imre Deak <imre.deak@xxxxxxxxx>
> Cc: Shashank Sharma <shashank.sharma@xxxxxxxxx>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>

Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>

Maybe we could make dim use coccinelle to flag these kinds of patterns
in the future to prevent them from sneaking back into the code?


Matt

> ---
>  drivers/gpu/drm/i915/intel_display.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 487b43ba3139..fba76f1bb6dd 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9310,11 +9310,11 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>  	pipe_config->gamma_mode =
>  		I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
>  
> -	if (IS_BROADWELL(dev_priv) || dev_priv->info.gen >= 9) {
> +	if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) {
>  		u32 tmp = I915_READ(PIPEMISC(crtc->pipe));
>  		bool clrspace_yuv = tmp & PIPEMISC_OUTPUT_COLORSPACE_YUV;
>  
> -		if (IS_GEMINILAKE(dev_priv) || dev_priv->info.gen >= 10) {
> +		if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
>  			bool blend_mode_420 = tmp &
>  					      PIPEMISC_YUV420_MODE_FULL_BLEND;
>  
> @@ -14217,7 +14217,7 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
>  		dev_priv->display.fdi_link_train = hsw_fdi_link_train;
>  	}
>  
> -	if (dev_priv->info.gen >= 9)
> +	if (INTEL_GEN(dev_priv) >= 9)
>  		dev_priv->display.update_crtcs = skl_update_crtcs;
>  	else
>  		dev_priv->display.update_crtcs = intel_update_crtcs;
> -- 
> 2.13.5
> 

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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