Hi, A small update to all userspace to select the engine to which the slice/subslice configuration applies (as suggested by Chris). Cheers, Chris Wilson (4): drm/i915: Record both min/max eu_per_subslice in sseu_dev_info drm/i915: Program RPCS for Broadwell drm/i915: Record the sseu configuration per-context & engine drm/i915: Expose RPCS (SSEU) configuration to userspace Lionel Landwerlin (1): drm/i915: expose helper mapping exec flag engine to intel_engine_cs drivers/gpu/drm/i915/i915_debugfs.c | 36 +++++++--- drivers/gpu/drm/i915/i915_drv.h | 21 +----- drivers/gpu/drm/i915/i915_gem_context.c | 55 ++++++++++++++ drivers/gpu/drm/i915/i915_gem_context.h | 21 ++++++ drivers/gpu/drm/i915/i915_gem_execbuffer.c | 18 ++--- drivers/gpu/drm/i915/intel_device_info.c | 32 +++++---- drivers/gpu/drm/i915/intel_lrc.c | 112 +++++++++++++++++++++++------ drivers/gpu/drm/i915/intel_lrc.h | 5 ++ include/uapi/drm/i915_drm.h | 28 ++++++++ 9 files changed, 258 insertions(+), 70 deletions(-) -- 2.14.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
