On Fri, 2017-09-08 at 16:45 -0700, Rodrigo Vivi wrote: > Don't touch other bits. My bad. > > I haven't seen any case where those other bits appeard to be > set before we touch it, but it is safe to avoid touching > other bits we weren't told to touch. > Well, I did notice the earlier patch cleared rest of the bits, but we do the same in ibx_init_clock_gating() and cpt_init_clock_gating() too. So, I assume it's okay either way and since these bits are for workarounds, I thought we might as well start by clearing the bits other than those we know are required. But, since you feel this version is a safer option, Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > Fixes: 0a46ddd57c9e ("drm/i915/cnp: Wa 1181: Fix Backlight issue") > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index fa9055a4f790..09ecc8e3b2d3 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -8370,7 +8370,8 @@ static void cnp_init_clock_gating(struct drm_i915_private *dev_priv) > return; > > /* Wa #1181 */ > - I915_WRITE(SOUTH_DSPCLK_GATE_D, CNP_PWM_CGE_GATING_DISABLE); > + I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) | > + CNP_PWM_CGE_GATING_DISABLE); > } > > static void cnl_init_clock_gating(struct drm_i915_private *dev_priv) _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx