On Fri, 18 Nov 2011 14:35:22 -0800
Keith Packard <keithp at keithp.com> wrote:
> On Fri, 18 Nov 2011 14:12:03 -0800, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
>
> > No this one should be looking at the bottom bit, so I think it's ok.
>
> Sorry, bad mail edit. There's one << 15 in both force_wake_mt_put and
> force_wake_mt_get and they both need to be << 16:
>
>
> +void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
> +{
> + int count;
> +
> + count = 0;
> + while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1))
> + udelay(10);
> +
> + I915_WRITE_NOTRACE(FORCEWAKE_MT, (1<<15) | 1);
>
> <<16
>
> + POSTING_READ(FORCEWAKE_MT);
> +
> + count = 0;
> + while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0)
> + udelay(10);
> +}
> +
>
> ...
>
> +void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
> +{
> + I915_WRITE_NOTRACE(FORCEWAKE_MT, (1<<15) | 0);
>
> <<16
>
> + POSTING_READ(FORCEWAKE_MT);
> +}
> +
>
> > Cool, hope it'll help others too.
>
> Let me know when you hear back from the VPG folks about how we're
> supposed to know which method to use.
So the ECOBUS reg *is* in the GT power well. Which means in order to
read it we have to disable RC6 altogether, forcibly, using the 0xa090
reg, set up force wake, then re-enable RC6.
--
Jesse Barnes, Intel Open Source Technology Center
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