In several instances the driver passes an 'enum pipe' value to a function expecting an 'enum transcoder' and viceversa. Since PIPE_x and TRANSCODER_x have the same values this doesn't cause functional problems. Still it is incorrect and causes clang to generate warnings like this: drivers/gpu/drm/i915/intel_display.c:1844:34: warning: implicit conversion from enumeration type 'enum transcoder' to different enumeration type 'enum pipe' [-Wenum-conversion] assert_fdi_rx_enabled(dev_priv, TRANSCODER_A); Change the code to pass values of the type expected by the callee. Signed-off-by: Matthias Kaehlcke <mka@xxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- drivers/gpu/drm/i915/intel_dp.c | 6 ++++-- drivers/gpu/drm/i915/intel_hdmi.c | 6 ++++-- drivers/gpu/drm/i915/intel_sdvo.c | 6 ++++-- 4 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ed1f4f272b4f..23484f042fae 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1841,7 +1841,7 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv, /* FDI must be feeding us bits for PCH ports */ assert_fdi_tx_enabled(dev_priv, (enum pipe) cpu_transcoder); - assert_fdi_rx_enabled(dev_priv, TRANSCODER_A); + assert_fdi_rx_enabled(dev_priv, PIPE_A); /* Workaround: set timing override bit. */ val = I915_READ(TRANS_CHICKEN2(PIPE_A)); @@ -4607,7 +4607,7 @@ static void lpt_pch_enable(struct drm_crtc *crtc) struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; - assert_pch_transcoder_disabled(dev_priv, TRANSCODER_A); + assert_pch_transcoder_disabled(dev_priv, PIPE_A); lpt_program_iclkip(crtc); diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d1670b8afbf5..454c2d3dfdd6 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3568,7 +3568,8 @@ intel_dp_link_down(struct intel_dp *intel_dp) * doing the workaround. Sweep them under the rug. */ intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false); - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); + intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, + false); /* always enable with pattern 1 (as per spec) */ DP &= ~(DP_PIPEB_SELECT | DP_LINK_TRAIN_MASK); @@ -3582,7 +3583,8 @@ intel_dp_link_down(struct intel_dp *intel_dp) intel_wait_for_vblank_if_active(dev_priv, PIPE_A); intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true); - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); + intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, + true); } msleep(intel_dp->panel_power_down_delay); diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 24b2fa5b6282..48b1f5d37204 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1153,7 +1153,8 @@ static void intel_disable_hdmi(struct intel_encoder *encoder, * doing the workaround. Sweep them under the rug. */ intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false); - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); + intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, + false); temp &= ~SDVO_PIPE_B_SELECT; temp |= SDVO_ENABLE; @@ -1172,7 +1173,8 @@ static void intel_disable_hdmi(struct intel_encoder *encoder, intel_wait_for_vblank_if_active(dev_priv, PIPE_A); intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true); - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); + intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, + true); } intel_hdmi->set_infoframes(&encoder->base, false, old_crtc_state, old_conn_state); diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 2ad13903a054..0568a9950f7f 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -1462,7 +1462,8 @@ static void intel_disable_sdvo(struct intel_encoder *encoder, * doing the workaround. Sweep them under the rug. */ intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false); - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); + intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, + false); temp &= ~SDVO_PIPE_B_SELECT; temp |= SDVO_ENABLE; @@ -1473,7 +1474,8 @@ static void intel_disable_sdvo(struct intel_encoder *encoder, intel_wait_for_vblank_if_active(dev_priv, PIPE_A); intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true); - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); + intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, + true); } } -- 2.12.2.816.g2cccc81164-goog _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx