On Thu, Apr 06, 2017 at 06:40:16PM +0300, Mika Kuoppala wrote: > Replace the handcrafter loop when checking for fifo slots > with atomic wait for. This brings this wait in line with > the other waits on register access. We also get a readable > timeout constraint, so make it to fail after 10ms. > > Chris suggested that we should fail silently as the fifo debug > handler, now attached to unclaimed mmio handling, will take care of the > possible errors at later stage. > > Note that the decision to wait was changed so that we avoid > allocating the first reserved entry. Nor do we reduce the count > if we fail the wait, removing the possiblity to wrap the > count if the hw fifo returned zero. > > v2: remove unclaimed check on timeout (Chris) > > References: https://bugs.freedesktop.org/show_bug.cgi?id=100247 > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_uncore.c | 29 ++++++++++++++--------------- > 1 file changed, 14 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 7a8eb2e..38ba97f 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -29,6 +29,7 @@ > #include <linux/pm_runtime.h> > > #define FORCEWAKE_ACK_TIMEOUT_MS 50 > +#define GT_FIFO_TIMEOUT_MS 10 > > #define __raw_posting_read(dev_priv__, reg__) (void)__raw_i915_read32((dev_priv__), (reg__)) > > @@ -181,28 +182,26 @@ static inline u32 fifo_free_entries(struct drm_i915_private *dev_priv) > > static int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) As this is patch 2/2, we could drop the int return here, and just make this a void function now. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
